Research

2026

1. JETCAS

   Drift-Resilient PCM-Based Analog In-Memory Computing for Tactile Sensing in Human-Robot Interaction: Efficient Feature Extraction

   A. Haidar, P. Kostka, V. Ntinas, and 1 more author

   IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2026

   Abstract DOI

   Analog in-memory computing (AIMC) with phase-change memory (PCM) offers substantial energy efficiency gains for edge inference by executing matrix-vector multiplications (MVMs) directly in memory, making it well suited to real-time tactile perception in robotics. A fundamental reliability challenge of PCM is conductance drift, a time-dependent stochastic reduction caused by structural relaxation that degrades inference accuracy over time. This paper presents a drift-resilient architecture that couples electrical time-domain reflectometry (ETDR) tactile sensing with PCM-based AIMC for human-robot interaction (HRI). In ETDR, touch-induced deformations create localized impedance discontinuities along an embedded transmission line, producing reflected RF signals that encode force magnitude and contact location in high-dimensional reflectograms. Based on this sensing modality, we evaluate a heterogeneous processing pipeline with three feature-extraction strategies under identical training and drift conditions: parameter-free Robust Segment Statistics (RSS), digitally executed PCA (PCA-D), and PCA mapped to analog crossbars (PCA-A). RSS matches PCA-D within 0.33 percentage points (pp) in digital accuracy, whereas PCA-A exhibits roughly twice the one-year drift degradation of PCA-D, indicating the penalty of mapping learned preprocessing to analog crossbars under the adopted drift model. Drift-aware regularization (DAR) improves RSS one-year force-classification accuracy from 86.87% to 88.03%, recovering 22.4% of the drift-induced loss, while PCA-D achieves a one-year localization error of 29.4 mm. These results suggest that keeping learned preprocessing parameters in the digital domain while applying physics-informed training to the analog classifier is a promising design principle for drift-resilient AIMC tactile inference in resource-constrained HRI systems.

2. TCAS-I

   Analysis and Design of Multitasking Memristor Cellular Nonlinear Networks

   V. Ntinas, D. Prousalis, Y. Wang, and 6 more authors

   IEEE Transactions on Circuits and Systems I: Regular Papers, 2026

   Abstract DOI 1

   Cellular Nonlinear Networks (CellNNs) represent a promising computational paradigm, renowned for their massively parallel operation and energy-efficient, and real-time multi-dimensional signal processing capabilities. The recent incorporation of memristors into CellNN architectures has notably enhanced their functionality by introducing analog, non-volatile memory elements that enrich the networks’ dynamic behavior. In this paper, we present a rigorous dynamical analysis and a structured methodology for designing multitasking operation in Memristor Cellular Nonlinear Networks (M-CellNNs). A distinctive outcome of this enhancement is the possibility of multitasking, where different operations can be performed with the same set of design parameters, and the executed task is determined solely by the memristor’s state. In this paper, we develop a rigorous dynamical analysis together with a structured methodology that enable the systematic design and reliable implementation of multitasking Memristor Cellular Nonlinear Networks (M-CellNNs). Methodologically, we extend the second-order Dynamic Route Map (DRM2) technique by integrating vector-field-based phase plane analysis, significantly improving the visualization and analytical characterization of realistic memristor dynamics within M-CellNN cells. Additionally, we propose a systematic analytical framework to precisely define the parameter spaces necessary for achieving targeted multitasking operations. Using a practical operational amplifier-based M-CellNN cell design well-suited for prototyping and functionality testing, we demonstrate our methodology through the reliable execution of multitasking operations, exemplified by the CORNER-EDGE task. Our enhanced analytical tools provide intuitive insights into complex system dynamics, facilitating accurate parameter selection and significantly advancing the practical feasibility and reliability of multitasking M-CellNN implementations.

3. TCAS-I

   Closed-Loop CBRAM Crossbar System Toward Hardware Acceleration of Quantum Algorithms

   I. A. Fyrigos, T. P. Chatzinikolaou, K. Rallis, and 6 more authors

   IEEE Transactions on Circuits and Systems I: Regular Papers, 2026

   Abstract DOI 0

   Quantum computing is a compelling new technology that is becoming increasingly practical as time progresses. Quantum computers have the potential to solve problems of great complexity and magnitude across many different industries, utilizing appropriate quantum algorithms. Given the evolving stage of quantum computing, characterized by a limited number of operational quantum computers that demand extensive cooling, face decoherence issues, and incur significant fabrication costs, there exists a pronounced need for quantum computer simulators. In this work, a reconfigurable closed-loop CBRAM crossbar system has been developed for the execution and acceleration of quantum algorithm simulation, leveraging analog in-memory computing. The circuit supports a universal set of quantum gates representation, and through its reprogramming capabilities and feedback loop, can compute any quantum algorithm. To demonstrate its functionality, the 3-qubit Grover algorithm is executed on the proposed circuit. Building on the extensive circuit simulation, a comparative analysis of power and speed between the proposed nanoelectronic circuit and conventional hardware has been conducted, demonstrating the high efficiency and performance gains, followed by a scalability analysis. Furthermore, a framework has been developed that supports the design of custom closed-loop memristive crossbars through a graphical user interface (GUI), providing the user with the capability to execute quantum algorithms and examine the programming and computations of the circuit, assisting with the realization of a hardware prototype.

4. PACET

   Resistive Memory Modeling: A Generalized Stochastic Framework Consolidating Variability, Parasitic, and Temperature Effects

   E. Tsipas, I. Tompris, E. Stavroulakis, and 8 more authors

   In 2026 Panhellenic Conference on Electronics and Telecommunications (PACET), 2026

   Abstract DOI 0

   Memristors’ enticing properties enable various unconventional computing paradigms, yet their inherent stochastic nature impedes circuit realization. Addressing this, a fully parameterizable stochastic RRAM model was implemented in Verilog-A, embodying intrinsic probabilistic time-evolution by combining memristor mathematics with Markov Processes and leveraging Chapman-Kolmogorov equations for transition rate integration. The proposed framework embodies the ensemble of reported conduction mechanisms in dielectric films in compact forms aiming at a universal implementation. A thorough behavioral and parametric analysis showcases the model’s adaptability to different devices and technologies. To showcase the framework’s potential, preliminary fitting results of fabricated SiN-based RRAM devices are presented.

5. Book

   6G Computing for Sensing: Universal Memcomputing Using Memristor Cellular Neural Networks

   D. Prousalis, I. Messaris, A. A. Khan, and 7 more authors

   In 6G-life: Digital Transformation and Sovereignty of Future Communication Networks, 2026

   Abstract DOI 0

   As 6G networks enable real-time data acquisition from millions of embedded sensors, the challenge of efficiently processing vast multi-modal datasets becomes paramount. This chapter explores how memcomputing, specifically through Memristor Cellular Neural Networks (M-CellNNs), can address these challenges by diverging from conventional compute-centric models. By leveraging volatile and non-volatile memristors, M-CellNNs can achieve high-speed, energy-efficient data processing directly at the sensor level, addressing challenges related to execution time, data privacy, and compatibility. We demonstrate the multitasking and memcomputing capabilities of M-CellNNs for simultaneous image processing, while emphasizing the need for novel software frameworks and mapping strategies to facilitate seamless integration of these advanced computing architectures. This discussion highlights M-CellNNs as a promising approach for scalable, robust, real-time data processing in 6G applications, with the potential to improve performance, accuracy, and energy efficiency.

6. ACS Nano

   Technology Roadmap of Bioinspired Computing Hardware

   S. Wang, Z. Li, M. Pei, and 70 more authors

   ACS Nano, 2026

   Abstract DOI 2

   The rapid growth of artificial intelligence (AI) is increasingly constrained by fundamental hardware bottlenecks in computation throughput and energy efficiency. Bioinspired computing (BIC) offers a promising alternative by emulating the intrinsic advantages of biological systems, such as parallelism, adaptability, and robustness. Progress in BIC hardware demands interdisciplinary convergence that bridges materials science and device physics with neuroscience, computer science, mathematics, and information science. Therefore, the development of this cross-disciplinary field urgently requires a comprehensive roadmap that analyzes systematically and in-depth the frontier issues and the latest progress. In this roadmap, we categorize the critical challenges into three components: hardware foundations, architectures, and prototype realizations. We highlight how biological features inspire the design of BIC hardware through device physics and discuss their performance metrics and engineering challenges. We then describe how diverse signaling rules and structural organizations in BIC architectures support specific computational prototypes, including electronic and photonic BIC chips, and present a technological roadmap that outlines opportunities to expand the functional scope of BIC hardware through coordinated advances in devices, architectures, and system demonstrations. This ongoing convergence of interdisciplinary knowledge can help accelerate the shift toward high-efficiency AI hardware.

2025

1. TCAS-I

   A Fast and Compact Threshold Switch-Based Cellular Nonlinear Network Cell

   A. Demirkol, A. Ascoli, I. Messaris, and 3 more authors

   IEEE Transactions on Circuits and Systems I: Regular Papers, 2025

   Abstract DOI 5

   In this work, we introduce a high speed and area efficient Cellular Nonlinear Network (CNN) cell, featuring two circuit variants that utilize threshold switches. The threshold switch (TS) model employed represents a current-controlled nanoscale negative differential resistance (NDR) device which exhibits an S-shaped DC I-V curve as a fingerprint. The proposed cell can be considered as the dual of the standard isolated CNN cell where the bistable cell characteristics, originating from the N-shaped voltage-controlled resistor, is implemented through the S-shaped current-controlled TSs. Similarly, the dynamics induced by the parallel capacitor accompanying the nonlinear resistor in the standard cell version are implemented through the internal inductive dynamics of the TSs, resulting in area and speed efficiency. The proposed CNN cell employs a DC voltage source, two bias resistors and 2 TSs, and essentially, features a differential-mode operation which helps to endow it with a symmetric DC I-V characterist

2. TNANO

   Dynamic Analysis of the Effect of the Device-to-Device Variability of Real-World Memristors on the Implementation of Uncoupled Memristive Cellular Nonlinear Networks

   Y. Wang, K. Schnieders, V. Ntinas, and 7 more authors

   IEEE Transactions on Nanotechnology, 2025

   Abstract DOI 2

   Cellular Nonlinear Networks (CNNs) are a well established computing approach in the domain of analog computing, known for massive parallelism and data processing locality that enable efficient hardware implementations. Combining CNN with non-volatile memristive devices holds the promise to overcome technological hurdles, like scalability issues, and high energy consumption, while also introducing richer dynamics into the field of CNN. Memristive devices based on the valence change mechanism (VCM) show great properties, like bipolar switching, tuneable resistance and non-volatility that are essential for the design of memristive CNN (M-CNN). In this study we design and investigate an uncoupled M-CNN cell implementing the EDGE detection task. This is the first paper investigating the resilience of M-CNN against device-to-device variability. To this end the first experimentally acquired Dynamic Route Map (DRM) of the M-CNN cell is employed. The comparison with simulations results allows for investigating the effect of mechanisms in the VCM device on the performance of the cell. The result of the computation is stored in the VCM device despite the unavoidable variability in the electrical behaviors of different device samples. Furthermore, the theoretically predicted richer dynamics of M-CNNs over traditional CNNs is demonstrated. This work provides crucial insights into design considerations of M-CNNs, especially as here first steps towards the comprehensive analysis on the effect of imperfections and variability of the memristor on M-CNN cell are taken.

3. TNANO

   Stochastic Templates and Noise Dynamics in Memristor Cellular Nonlinear Networks

   D. Prousalis, V. Ntinas, C. Theodorou, and 4 more authors

   IEEE Transactions on Nanotechnology, 2025

   Abstract DOI 2

   Noise is a pervasive aspect that impacts various systems and environments, from mobile radio channels to biological systems. Within the framework of complex networks, noise poses significant challenges for functionality and performance. In this paper, we investigate the dynamics of a well-known type of locally-coupled computing networks, Memristor Cellular Nonlinear Networks (M-CNNs), in the presence of noise at their interconnection weights, introducing the concept of stochastic weights. In particular, we analyze the effect of noise originating from the synaptic memristors by incorporating both deterministic and stochastic components into synaptic weights, investigating how device-to-device variability and noise affect network performance. Based on the well-established theory of CNNs, we are extending the stability criteria to incorporate synaptic memristor non-idealities and we provide a theoretical framework to analyze their effect on system’s performance. In this work, we employ the physics-based Jülich Aachen Resistive Switching Tools (JART) model to study Valence Change Memory (VCM) devices as synapses within our theoretical framework. We investigate the impact of device variability and noise, utilizing statistical properties derived from experimental data reported in the literature. We demonstrate the efficacy of noisy M-CNNs in performing the edge detection task, an example of fundamental image processing applications.

4. AEM

   Edge of Chaos Theory Unveils the First and Simplest Ever Reported Hodgkin–Huxley Neuristor

   A. Ascoli, A. Demirkol, I. Messaris, and 10 more authors

   Advanced Electronic Materials, 2025

   Abstract DOI 24

   The Hodgkin-Huxley model is an accurate yet convoluted mathematical description of the complex nonlinear dynamics of a biological neuronal axon. Employing four degrees of freedom, three of which embodied by the sodium and potassium memristive ion channels, it is capable to capture the cascade of three fundamental bifurcations, specifically a Hopf supercritical, a Hopf subcritical, and a saddle-node limit cycle bifurcation, marking the life cycle from birth to extinction via All-to-None effect of an electrical spike, also referred to as Action Potential in the literature, across biological axon membranes under monotonic change in the net synaptic current. This paper recurs to powerful concepts from the Local Activity and Edge of Chaos Principle and to methods from Circuit Theory and Nonlinear Dynamics to design the first and simplest ever-reported electrical circuit, which, leveraging the peculiar Negative Differential Resistance effects in a volatile NbOx threshold switch from NaMLab, and including additionally just one capacitor and one DC current source in its minimal topology, undergoes the three-bifurcation cascade, emerging across the fourth-order Hodgkin-Huxley neuron model under monotonic current sweep, while requiring half the number of degrees of freedom.

5. Book

   Design and Implementation of Cellular Automata Computing Architectures

   T. Chatzinikolaou, I. Tompris, A. Passias, and 14 more authors

   In Advances in Cellular Automata: Volume 2: Computation and Applications, 2025

   Abstract DOI 0

   Cellular Automata (CAs) have emerged as one of the most straightforward computational models, distinguished by their proven capabilities to effectively simulate various complex physical systems and processes. CAs have two important properties-intrinsic parallelism and locality-that make them perfect for real-world computer architectures. They also make it easier for data to move between dedicated memory and processing cores, which is known as the von Neumann bottleneck. To leverage these advantages, extensive research has been conducted over the past decades, focusing on appropriate computer architectures, hardware implementations, and VLSI/FPGA applications. This chapter delves into the CAs and their abilities to deal with the aforementioned bottleneck, offering enhanced performance, especially when coupled with appropriate nanoelectronic, VLSI and FPGA technologies, circuits, and architectures. At the same time, the fact that CAs can be used for many different types of physical modeling tasks has led to the creation of many separate hardware implementations that aim to improve the performance of CA models in fields like physics, chemistry, ecology, geology, biology, and computer science. Furthermore, researchers have recently looked into new ways of doing things, like using memristors, oscillating circuits, quantum cellular automata (CA), and Graphene-based CA to build advanced hybrid CAs. These innovative methods hold the potential to further advance the pronounced capabilities of CAs, offering new dimensions of efficiency and functionality. Consequently, this chapter provides a comprehensive overview of CAs hardware also with a special emphasis on these recent advancements and their potential to revolutionize CA applications.

6. MOCAST

   Ndr Effects in a Locally-Active Memristor Induce Small-Signal Amplification in a Simple Cell

   A. Ascoli, E. Gemo, F. Corinto, and 11 more authors

   In 2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2025

   Abstract DOI 4

   The Pt/NbOx/Nb2O5/Pt threshold switch, manufactured at NaMLab, may admit a negative differential resistance (NDR). For example, this occurs when a constant voltage, let fall across a two-element one-port, composed of its series connection with a suitable linear resistor, stabilizes its bias point on a branch of the respective DC current-voltage characteristic, along which the slope assumes negative values. In this research study, the local energy which the switch releases about the NDR bias point, when a small-signal sine wave signal superimposed on top of the DC stimulus is applied, is leveraged to induce the development of larger oscillations across the resistor than those generated by the input source.

7. ISCAS

   Edge of Chaos Induces a Hopf Bifurcation in a Bio-Inspired Thermally-Activated Memristor Oscillator

   A. Ascoli, E. Gemo, D. Rossetti, and 14 more authors

   In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

   Abstract DOI 2

   This manuscript sheds light into the fundamental importance of the Principles of Local Activity and Edge of Chaos for the future design of innovative circuits, which, employing biomimetic memristive devices, are ideally suited for the development of energy-efficient artificially-intelligent technical systems. The focus of the work is the design of a Second-Order Reactance-Less Oscillator, across which oscillations may develop if and only if at least one of its two different volatile thermally-activated memristor physical realizations is biased along a negative differential resistance branch of the respective DC locus.

8. ISCAS

   Dynamical Analysis of Novel Memristor Cellular Nonlinear Network Cell Topologies

   C. Yu, V. Ntinas, D. Prousalis, and 4 more authors

   In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

   Abstract DOI 0

   As demand grows for efficient, localized processing in edge and in-sensor computing, novel architectural approaches are essential to meet low-power, high-density requirements. Memristor Cellular Nonlinear Networks (M-CNNs) offer a promising path forward, leveraging the unique properties of memristors for adaptable and scalable computation. This paper presents a study of novel M-CNN cell configurations designed to enhance computational versatility and address operational challenges in M-CNN-based systems.

9. ISCAS

   Live Demonstration: 4 \times 4 Memristive Cellular Nonlinear Network in EDGE Detection Operation

   Y. Wang, K. Schnieders, S. Jia, and 9 more authors

   In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

   Abstract DOI 1

   We have successfully fabricated one of the earliest array-scale prototypes of a Memristive Cellular Nonlinear Network (M-CNN) with interconnected cells. In this live demonstration, we showcase the operation of this 4x4 M-CNN array performing an edge detection task.

10. ISCAS

    Attention-Driven PCM-Based In-Memory Computing for Smart Vision Systems

    A. Haidar, A. Khan, V. Ntinas, and 3 more authors

    In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

    Abstract DOI 2

    This paper introduces an energy-efficient on-chip system that integrates compressed sensing with analog in-memory computing based on Phase-Change Memory (PCM) devices to enable robust feature extraction and inference. The proposed architecture employs compressed sensing for dimensionality reduction at the sensor level, generating low-dimensional feature vectors directly fed into a single-layer artificial neural network (ANN) implemented on PCM crossbars.

11. ISCAS

    A Simplified Analysis of Threshold Switch Based Neuron Circuits

    A. Demirkol, R. Schroedter, I. Messaris, and 4 more authors

    In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

    Abstract DOI 0

    In this work, we introduce a simplified modeling approach for the analysis of threshold switch (TS) based neuron circuits where, under given constraints, we represent the TS device as a nonlinear resistor in series with a parasitic inductor. We analyze the conventional Leaky Integrate and Fire (LIF) neuron circuit along with two of its modified variants.

12. ISCAS

    Memristor Resistance State Tuning with High-Frequency Periodic Inputs

    I. Messaris, V. Ntinas, D. Prousalis, and 6 more authors

    In 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025

    Abstract DOI 0

    Realized memristors exhibit a unique phenomenon called the fading memory effect, where the memristor response to an AC signal is determined by its characteristics (waveform, amplitude, frequency, and DC offset) rather than the memristor initial conditions. Recently, a method for programming Hewlett Packard’s TaOx memristor to a target state was proposed, involving configuring the DC offset of a high-frequency square-wave AC voltage input. This served as a basic application example that exploits fading memory in non-volatile memristors, but didn’t consider non-ideal effects. Here, we assess the method applicability in a HfOx-based VCM resistive switch from Forschungszentrum Julich incorporating a variability-aware physics-based model.

13. OJ-NANO

    WaCPro: An Open-Source Application for Waveform and Crossbar Programming in Nanotechnology Research

    I. K. Chatzipaschalis, P. Fraidakis, G. K. Kleitsiotis, and 11 more authors

    IEEE Open Journal of Nanotechnology, 2025

    Abstract DOI 0

    Memristors and crossbar arrays are increasingly regarded as fundamental nanotechnology components for future computing and storage technologies, with promising applications in neuromorphic systems, non-volatile memories, and in-memory processing. However, their characterization and programming require precise waveform generation and reproducible signal control, which pose non-trivial challenges in experimental workflows. Developing dedicated software for waveform design in this context is particularly demanding, as it must support diverse signal types, customizable timing, and the coordination of row/column activations in crossbar architectures, while remaining intuitive for non-specialist users. This paper presents WaCPro, an open-source application that integrates waveform generation, crossbar mapping, visualization, and export functionalities into a single platform for the characterization and programming of nanoscale memristive devices and crossbar arrays. Implemented in MATLAB with a modular architecture and a graphical user interface, WaCPro enables the design and export of precisely-timed waveforms essential for the electrical stimulation of nanodevices. Export functions produce simulation- and instrumentation-ready files in widely used formats, facilitating integration into laboratory workflows, highlighting the tool’s ability to bridge theory and experiment. Validation experiments demonstrate excellent waveform replication accuracy in both amplitude and timing, confirming the reliability of the proposed tool for nanoscale testing environments.

14. ICM

    Temporal Drift-Regularization and Hyperparameter Optimization for Phase-Change Memory-Based Neural Network Applications

    A. Haidar, A. Abdelsamad, H. Yang, and 2 more authors

    In 2025 37th International Conference on Microelectronics (ICM), 2025

    Abstract DOI 0

    Analog in-memory computing (AIMC) with phase-change memory (PCM) crossbars enables energy-efficient neural network inference but suffers from conductance drift, leading to accuracy degradation over time. While hardware-aware training and global drift compensation partially address this challenge, they either treat drift as static noise or require frequent recalibration with associated energy costs. Building on our prior drift-aware regularization framework, this work introduces a reformulated drift-regularization algorithm with drift modeling, combined with systematic temporal training and hyperparameter optimization, to achieve robust performance across diverse deployment timescales. By training networks with multiple temporal time scales and optimizing regularization strength, we enable models to learn drift-resilient weight configurations that maintain stability under long-term drift inference. Experimental evaluation on CIFAR-10 demonstrates substantial improvements: ResNet20 maintains 88.09% accuracy after 5 years versus an 86.66% baseline (+1.43%), while ResNet-9s achieves 84.27% versus an 82.75% baseline (+1.52%), relative to recovering 32% of drift-induced degradation with a negligible initial performance penalty. These findings offer practical insights for deploying PCM-based AIMC systems in applications requiring sustained multi-year operation without periodic recalibration.

15. AICAS

    Drift-Aware Regularization for Long-Term Stability in Phase-Change Memory Based Neural Network Implementations

    A. Haidar, V. Ntinas, and R. Tetzlaff

    In 2025 IEEE 7th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2025

    Abstract DOI 1

    Phase-Change Memory (PCM) based resistive crossbars are a promising technology for energy-efficient neural network inference in analog in-memory computing (AIMC) systems. However, a conductance drift in PCM devices degrades performance over time, posing a challenge for applications requiring long-term stability. In order to overcome such problems, we propose a drift-aware regularization framework that stabilizes weight drift during training, complemented by an attention-based mechanism to prioritize critical features. Our approach significantly improves upon traditional hardware-aware (HWA) training and achieves more robust inference performance in the presence of conductance drift. In a five-year drift simulation, our method reduces classification error to 3.75%, compared to 9.14% with standard HWA training on a benchmark two-layer perceptron for the MNIST dataset. When combined with global drift compensation, the error is further reduced to 2.12%. These results demonstrate the effectiveness of our drift-aware regularization in enhancing the stability and accuracy of neural networks on AIMC hardware, offering a scalable, energy-efficient solution for inference in resource-constrained environments.

16. IJCNN

    The Hodgkin-Huxley Neuristor

    A. Ascoli, E. Gemo, F. Corinto, and 11 more authors

    In 2025 International Joint Conference on Neural Networks (IJCNN), 2025

    Abstract DOI 3

    The electrical engineering community, interested to develop bio-inspired circuits, approaching the efficiency of the neural networks, is searching passionately for accurate yet simple electronic neurons, or neuristors for short. In recent years, the advent of volatile memristor devices, typically referred to as threshold switches, which admit a negative differential resistance under suitable polarization, similarly as the sodium and potassium ion channels across neuronal axon membranes, has opened up new exciting opportunities in neuromorphic circuit design, enabling innovative analogue electronic cells, capable to reproduce closely the intricate dynamical behaviors of biological neurons without requiring a disproportionate use of resources. The study, presented in this manuscript, achieves an important milestone in this area of research, demonstrating, through a circuit design approach based upon concepts and techniques from Dynamical System Theory, how to leverage the rich dynamics of a threshold switch, capable to boost a periodic sine-wave current signal of infinitesimal amplitude, while acting as a source of local energy, when poised on a suitable bias point, lying along the negative differential resistance branch of the respective S-shaped DC current-voltage characteristic, to induce, one after the other, the three fundamental bifurcations, governing the evolution of an electrical voltage spike from birth to extinction via the All-to-None effect across a biological axon membrane under a reverse sweep in the net synaptic current, according to the fourth-order Hodgkin-Huxley neuron model, in a second-order three-element circuit of unprecedented simplicity, as the current, generated by a DC source, appearing in parallel to a linear capacitor as well as to the volatile locally-active memristor, is subject to a monotonic increase.

2024

1. EDL

   Noise-Induced Homeostasis in Memristor-Based Neuromorphic Systems

   E. Salvador, R. Rodriguez, E. Miranda, and 6 more authors

   IEEE Electron Device Letters, 2024

   Abstract DOI 5

   In this work, it is experimentally demonstrated that noise can be used to emulate the biological homeostatic neuron property in memristor-based neuromorphic systems. The addition of an external noise to the bias allows regulating the memristor performance when used as an artificial neuron, controlling the firing process through the modulation of the memristor threshold voltages. Experimental results have been correctly addressed using the Dynamic Memdiode Model (DMM) for memristors in the framework of SPICE simulation.

2. AEU

   Custom RISC-V Architecture Incorporating Memristive In-Memory Computing

   K. Mallios, I. Tompris, A. Passias, and 3 more authors

   AEU – International Journal of Electronics and Communications, 2024

   Abstract DOI 9

   Due to the rise in data-intensive applications, the von Neumann bottleneck is increasingly restricting modern computer architectures, resulting to latency and energy consumption. Addressing this challenge necessitates a CMOS-compatible solution with high energy efficiency and significant parallelism. Utilizing resistive switching components within a 1T1R crossbar array and the application of Stanford RRAM model, this paper suggests an original method for in-memory computing. Moreover, this work shows a new way to advance the popular RISC-V architecture by including memristive crossbar array. It does this by adding a custom instruction set, special hardware blocks, and the Scouting Logic Scheme. These modifications serve both as a comprehensive testbed for the memory system and a proof of concept for the future integration of memristors in computing architectures. The proposed design undergoes extensive testing and power analysis to validate its functionality and performance under various conditions. The results demonstrate significant improvements in computational efficiency and energy savings, highlighting the potential of memristor-based in-memory computing systems to overcome current architectural limitations.

3. TED

   Stochastic Resonance in HfO_2-Based Memristors: Impact of External Noise on the Binary STDP Protocol

   E. Salvador, R. Rodriguez, E. Miranda, and 6 more authors

   IEEE Transactions on Electron Devices, 2024

   Abstract DOI 3

   This article deals with the stochastic resonance (SR) phenomenon experimentally observed in HfO2-based memristors. The SR impact on the binary spike time-dependent plasticity (STDP) protocol at the device level was investigated. We demonstrate that the two extreme conductance states of the device that represent the synaptic weights in neuromorphic systems can be better distinguished with the incorporation of Gaussian noise into the bias signal. This technique allows setting the memristor conductance which is directly related to the overlap between the pre- and postsynaptic pulses. The study is reproduced in the LTSPICE simulator using the dynamic memdiode model (DMM) for memristors.

4. AEM

   High Frequency Response of Volatile Memristors

   I. Messaris, A. Ascoli, A. Demirkol, and 3 more authors

   Advanced Electronic Materials, 2024

   Abstract DOI 11

   In this theoretical study, the high-frequency response of the electrothermal NbO2-Mott threshold switch is focused, a real-world electronic device, which has been proved to be relevant in several applications and is classified as a volatile memristor. Memristors of this kind, have been shown to exhibit distinctive non-linear behaviors crucial for cutting-edge neuromorphic circuits. In accordance with well-established models for these devices, their resistances depend on their body temperatures, which evolve over time following Newton’s Law of Cooling. Here, it is demonstrated that HP’s NbO2-Mott memristor can manifest up to three distinct steady-state oscillatory behaviors under a suitable high-frequency periodic voltage input, showcasing increased versatility despite its volatile nature. Additionally, when subjected to a high-frequency periodic voltage signal, the device body temperature oscillates with a negligible peak-to-peak amplitude. Since the temperature remains almost constant over an input cycle, the devices under study behave as linear resistors during each input cycle. Based on these insights, this paper presents analytical equations characterizing the response of the NbO2-Mott memristor to high-frequency voltage inputs, demarcating regions in the state space where distinct initial conditions lead to various asymptotic oscillatory behaviors. Importantly, the mathematical methods introduced in this manuscript are applicable to any volatile electrothermal resistive switch. Additionally, this work presents analytical equations that accurately reproduce the temperature time-waveform of the studied device during both its transient and steady-state phases when subjected to a zero-mean sinusoidal voltage input oscillating in the high-frequency limit. This analytical approach not only increases the comprehension of volatile electrothermal memristors but also provides a theoretical framework to harness the enhanced dynamical capabilities of real-world volatile memristors in practical applications.

5. TCAS-II

   Experimental Evaluation of Silicon Nitride Memristors as Coupling Elements for Chimera States in Chaotic Oscillator Networks

   K. Tsakalos, V. Ntinas, N. Vasileiadis, and 3 more authors

   IEEE Transactions on Circuits and Systems II: Express Briefs, 2024

   Abstract DOI 3

   Chimera states have attracted significant research interest due to their potential in modeling brain network functionality. Memristive nano-crossbars, known for their energy efficiency, massive parallelism, and synaptic-like properties, serve as a promising coupling medium in brain-inspired applications. The operation of these devices is strongly dictated by the non-linear mechanisms of memristor devices when studying synchronization phenomena. Expanding upon our previous work, which explored sneak-path currents in Chimera states, this study investigates the impact of fabricated Silicon Nitride (SiN) devices on the dynamics of Chua circuit (CC) networks. We conducted experimental evaluations to confirm the ability of SiN devices to retain their resistance state, thereby ensuring consistency in the crossbar array, a critical factor in maintaining chimera states during experiments. We employed an exponential memristor model to further investigate the non-linear dynamics within the CC network. Our results not only confirm the formation of various synchronization structures, such as chimera states and full chaotic synchronization but also reveal the intriguing formation of phase-lag structures. These structures, induced by the SiN-fitted model, exhibit distinctive characteristics marked by subtle and non-linear coupling behaviors, particularly evident at near-zero voltages. After analyzing our results, we present a comprehensive phase-parametric regime map, obtained by varying the coupling strength bifurcation parameter. This map provides valuable insights into the mechanisms governing the dynamics of CC networks equipepd with SiN-based memristor nanodevices, which have proven capable of capturing the complex dynamics of chimera states.

6. ICECS

   Implementation of a Multiclass Support Vector Machine on a Differential Memristor Crossbar

   A. Khan, V. Ntinas, J. Fernandez-Berni, and 2 more authors

   In 2024 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2024

   Abstract DOI 1

   The implementation of modern complex machine learning algorithms on a conventional von Neumann architecture faces severe challenges to maintain efficiency in terms of energy consumption, memory requirement, and latency. Data-centric architectures result in a more appropriate alternative to exploit the inherent parallelism of multidimensional sensory signals. A viable implementation alternative is based on memristor crossbars. Matrix-vector multiplication, which is one resource-hungry operation in conventional architectures, can be performed by memristor crossbar arrays by using very limited resources. In this work, we explore the implementation of a multiclass support vector machine (SVM) on a differential memristor crossbar array. The Voltage Threshold Adaptive Memristor (VTEAM) model has been employed for the simulation of memristor behavior. The feature vector for SVM has been produced by a compressed sensing based vision sensor architecture. The weights of the ex situ trained SVM, are mapped to the device physical parameters to achieve the equivalent conductance. As a case study, the proposed scheme has been tested for face recognition against a widely accepted face dataset.

7. SMACD

   Image Processing with Memristor Cellular Nonlinear Networks Featuring Volatile Threshold Switches

   D. Prousalis, I. Messaris, A. Sayed, and 4 more authors

   In 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2024

   Abstract DOI 2

   In this manuscript, we investigate the dynamics of Memristor Cellular Nonlinear Networks, focusing on the complex behaviors of 2-terminal locally active volatile threshold switches, known as volatile memristors, using a circuit-theoretic approach. We show that a cell within the array equipped with an NbO2-based volatile threshold switch can exhibit both oscillatory and static dynamics depending on the parameters of the Memristor Cellular Nonlinear Network. We utilize the latter to design an M-CNN for image processing that performs edge detection on binary input images.

8. MetroX

   Experimental Evidence for Local Fading Memory Effects in TaOx ReRAM Cells

   N. Schmitt, I. Messaris, A. Demirkol, and 10 more authors

   In 2024 IEEE International Conference on Metrology for eXtended Reality, Artificial Intelligence and Neural Engineering (MetroXRAINE), 2024

   Abstract DOI 0

   This contribution presents experimental verification of bistability, a special form of local fading memory, in a physical TaOx memristor. System-theoretic methods are applied to the physics-based model of the ReRAM cell under consideration to explore the origin of the local fading memory and its robustness against the intrinsic cycle-to-cycle variability of the device. Multiple real-world measurements are performed to confirm the existence of one separatrix in the transient behavior of the device as a fingerprint of bistability.

9. MOCAST

   Frequency Dependent Bistability in a Volatile Threshold Switch

   I. Messaris, A. Demirkol, A. Ascoli, and 4 more authors

   In 2024 13th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2024

   Abstract DOI 1

   The theoretical study performed in this paper demonstrates that the NbO2-Mott memristor considered here could exhibit two distinct steady-state responses when stimulated by a sinusoidal current input of suitable amplitude, provided the input frequency is sufficiently high. By utilizing methods from circuit theory, this work establishes a link between the two possible dynamical regimes observed in this nanodevice, under the assumed simulation settings hereby, and a versatile dynamical phenomenon it exhibits, known as local fading memory. The mechanisms driving local fading memory in the high frequency limit are investigated here analytically. This feature of the NbO2-Mott memristor, revealed through our analyses, if further validated through experimental studies, could further enhance the already established versatility of this device and may be exploited in suitable practical applications.

2023

1. Electronics

   Memristors in Cellular-Automata-Based Computing: A Review

   R. Karamani, I. Fyrigos, V. Ntinas, and 3 more authors

   Electronics, 2023

   Abstract DOI 8

   The development of novel hardware computing systems and methods has been a topic of increased interest for researchers worldwide. New materials, devices, and architectures are being explored as a means to deliver more efficient solutions to contemporary issues. Along with the advancement of technology, there is a continuous increase in methods available to address significant challenges. However, the increased needs to be fulfilled have also led to problems of increasing complexity that require better and faster computing and processing capabilities. Moreover, there is a wide range of problems in several applications that cannot be addressed using the currently available methods and tools. As a consequence, the need for emerging and more efficient computing methods is of utmost importance and constitutes a topic of active research. Among several proposed solutions, we distinguish the development of a novel nanoelectronic device, called a “memristor”, that can be utilized both for storing and processing, and thus it has emerged as a promising circuit element for the design of compact and energy-efficient circuits and systems. The memristor has been proposed for a wide range of applications. However, in this work, we focus on its use in computing architectures based on the concept of Cellular Automata. The combination of the memristor’s performance characteristics with Cellular Automata has boosted further the concept of processing and storing information on the same physical units of a system, which has been extensively studied in the literature as it provides a very good candidate for the implementation of Cellular Automata computing with increased potential and improved characteristics, compared to traditional hardware implementations. In this context, this paper reviews the most recent advancements toward the development of Cellular-Automata-based computing coupled with memristor devices. Several approaches for the design of such novel architectures, called “Memristive Cellular Automata”, exist in the literature. This extensive review provides a thorough insight into the most important developments so far, helping the reader to grasp all the necessary information, which is here presented in an organized and structured manner. Thus, this article aims to pave the way for further development in the field and to bring attention to technological aspects that require further investigation.

2. Access

   MemCA: All-Memristor Design for Deterministic and Probabilistic Cellular Automata Hardware Realization

   V. Ntinas, I. Fyrigos, R. Karamani, and 4 more authors

   IEEE Access, 2023

   Abstract DOI 11

   Inspired by the behavior of natural systems, Cellular Automata (CA) tackle the demanding long-distance information transfer of conventional computers by the massive parallel computation performed by a set of locally-coupled dynamical nodes. Although CA are envisioned as powerful deterministic computers, their intrinsic capabilities are expanded after the memristor’s probabilistic switching is introduced into CA cells, resulting in new hybrid deterministic and probabilistic memristor-based CA (MemCA). In the proposed MemCA hardware realization, memristor devices are incorporated in both the cell and rule modules, composing the very first all-memristor CA hardware, designed with mixed CMOS/Memristor circuits. The proposed implementation accomplishes high operating speed and reduced area requirements, exploiting also memristor as an entropy source in every CA cell. MemCA’s functioning is showcased in deterministic and probabilistic operation, which can be externally modified by the selection of programming voltage amplitude, without changing the design. Also, the proposed MemCA system includes a reconfigurable rule module implementation that allows for spatial and temporal rule inhomogeneity.

3. NANOARCH

   Experimental Verification of Uncoupled Memristive Cellular Nonlinear Network by Processing the EDGE Detection Task

   Y. Wang, K. Schnieders, V. Ntinas, and 7 more authors

   In Proceedings of the 18th ACM International Symposium on Nanoscale Architectures (NANOARCH), 2023

   Abstract DOI 4

   The Cellular Nonlinear Network (CNN) is a powerful paradigm in analog computing. As pure-CMOS based CNN Universal Machine faces the von Neumann bottleneck, the integration of memristive devices with their non-volatile memory properties is of major interest. These networks are called Memristor-CNNs (M-CNNs). Moreover, the integration of memristors brings richer dynamics into the network, such that M-CNNs are highly suitable for neuromorphic computing tasks. This paper presents the experimental verification of a processing unit of an uncoupled M-CNN design with a valance change mechanism (VCM) based memristor. We outline a simple measurement strategy to study M-CNNs with real-world devices and provide compelling evidence that the results of the M-CNN processing element are stored in a non-volatile manner. This work further offers crucial insights into design considerations of M-CNN networks.

4. NANOARCH

   Stochastic Template in Cellular Nonlinear Networks Modeling Memristor Induced Synaptic Noise

   D. Prousalis, V. Ntinas, I. Messaris, and 3 more authors

   In Proceedings of the 18th ACM International Symposium on Nanoscale Architectures (NANOARCH), 2023

   Abstract DOI 2

   Noise is one of the most challenging aspects of cellular nonlinear networks adversely affecting their functionality. Existing techniques to addressing the issues posed by noise are based on well-understood noise removal methods that have reached technical maturity and further have the disadvantage of limited success rates. A deeper understanding and modeling of noise dynamics and its origins are required for the efficient identification and resolution of problems in different network applications. The Stochastic template concept in this article can be beneficial in understanding and modeling noise dynamics in cellular nonlinear networks, which is critical for addressing challenges in network applications. In this paper, memristors functioning as synapses introduce noise into networks, and we conduct an initial investigation of a noisy network performing edge detection.

5. CNNA

   Explaining a Recent Observation of Bistability in the Oscillatory Response of a Pulse-Driven ReRAM

   A. Ascoli, N. Schmitt, I. Messaris, and 8 more authors

   In 2023 18th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), 2023

   Abstract DOI 0

   This brief elucidates a recent observation, based on the numerical integration of a predictive model of a ReRAM cell, manufactured at Forschungszentrum Jülich, under the as-sumption that a particular symmetric triangular periodic voltage waveform is let fall continuously between the device terminals. Averaging the model state equation in time, a rigorous methodol-ogy is developed to identify all the admissible levels, around which the memory state of the non-volatile memristor may oscillate asymptotically. This work provides proof of evidence for the benefits that a theoretic approach may provide to circuit design with inherently-nonlinear memristive nanostructures.

6. CNNA

   Employing Vector Field Techniques on the Analysis of Memristor Cellular Nonlinear Networks Cell Dynamics

   C. Singh, V. Ntinas, D. Prousalis, and 7 more authors

   In 2023 18th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), 2023

   Abstract DOI 3

   This paper introduces an innovative graphical anal-ysis tool for investigating the dynamics of Memristor Cellular Nonlinear Networks (M-CNNs) featuring 2nd-order processing elements, known as M-CNN cells. In the era of specialized hardware catering to the demands of intelligent autonomous systems, the integration of memristors within Cellular Nonlinear Networks (CNNs) has emerged as a promising paradigm due to their exceptional characteristics. However, the standard Dynamic Route Map (DRM) analysis, applicable to 1st-order systems, fails to address the intricacies of 2nd -order M-CNN cell dynamics, as well the 2nd-order DRM (DRM2) exhibits limitations on the graphical illustration of local dynamical properties of the M-CNN cells, e.g. state derivative’s magnitude. To address this limitation, we propose a novel integration of M-CNN cell vector field into the cell’s phase portrait, enhancing the analysis efficacy and enabling efficient M-CNN cell design. A comprehensive exploration of M- CNN cell dynamics is presented, showcasing the utility of the proposed graphical tool for various scenarios, including bistable and monostable behavior, and demonstrating its superior ability to reveal subtle variations in cell behavior. Through this work, we offer a refined perspective on the analysis and design of M-CNNs, paving the way for advanced applications in edge computing and specialized hardware.

7. SMACD

   A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation

   V. Ntinas, D. Patel, Y. Wang, and 5 more authors

   In 2023 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2023

   Abstract DOI 13

   Accurate and computationally cost-efficient models for fabricated memristor devices are essential for the design of future computers and AI-driven sensor-processor systems, especially for the simulation of large-scale circuits and systems. The variability-aware JART memristor model properly captures both the conduction mechanisms and the dynamical behavior of actual Valence Change Mechanism (VCM) memristors. However, the original JART VCM model incorporates an implicit description of the memristor current that constitutes a computationally heavy approach. Here, we aim to simplify the JART VCM model by replacing this implicit description with an explicit mathematical expression, leading to faster simulations and enabling deeper theoretical studies. The improvement achieved using the proposed model goes over x20 in simulation speed for increasing number of VCM devices, allowing for faster simulation of computing-inmemory and memristor-based AI systems.

8. SMACD

   Multitasking and Memcomputing in Memristor Cellular Nonlinear Networks: Insights into the Underlying Mechanisms

   I. Messaris, A. Ascoli, D. Prousalis, and 3 more authors

   In 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2023

   Abstract DOI 6

   Memristor Cellular Nonlinear Networks (M-CNNs) represent a significant leap in computational technology compared to traditional Cellular Nonlinear Networks (CNNs), thanks to their multi-tasking and memcomputing capabilities. Recent studies have demonstrated various configurations of M-CNNs that utilize these capabilities to perform image processing tasks. This paper employs the Dynamic Route Map circuit-theoretic analysis tool to investigate the dynamic features of M-CNNs and shed light on the underlying mechanisms responsible for their ability to handle multiple tasks. The findings from this theoretical study offer valuable insights for the development of more compact and highly efficient data processing M-CNNs that possess such versatile properties.

9. MOCAST

   Exploration of Bistable Oscillatory Dynamics in a Memristor from Forschungszentrum Jülich

   N. Schmitt, A. Ascoli, I. Messaris, and 7 more authors

   In 2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2023

   Abstract DOI 1

   Very recently, a deep numerical investigation of resistance switching phenomena in a TaOxReRAM cell from Forschungszentrum Jülich, based on a predictive physics-based model, uncovered the capability of the nano-device to exhibit one of two possible steady-state oscillatory behaviours, depending upon the initial condition, under specific AC periodic triangular wave stimuli. In these circumstances, however, one of the two oscillations in the device memory state, was found to hit cyclically the lower bound in the existence domain of the model solution. Out of a thorough numerical exploration of the model, guided by system-theoretic considerations based upon the Time Average State Dynamic Route tool, this paper shows that it is indeed possible to shape the parameters of an AC periodic pulse train excitation signal so that each of the two locally-stable oscillatory response solutions for the memory state of the ReRAM cell lie well within the range of admissible values.

10. ISCAS

    Design and Analysis of Isolated Voltage-Mode Memristor Cellular Nonlinear Network Cells

    V. Ntinas, Y. Wang, A. Demirkol, and 5 more authors

    In 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023

    Abstract DOI 6

    In this paper, the design of an isolated Memristor Cellular Nonlinear Network (CNN) cell with discrete electronic elements is presented. The proposed versatile circuit allows for adjustable cell dynamical characteristics, controlled by design parameters, while the discrete element approach enables simple on-board implementation without the need for large-scale integration, which is necessary for testing hardware with individual fabricated memristors. A voltage-mode approach, that makes use of the diversity of operational amplifiers, is preferred here over a current-mode one that necessitates a large number of individual transistors. The dynamical properties of the system are initially investigated through the calculation of equilibrium points and further illustrated applying the concept of State Dynamic Routes (SDRs) for the cell assuming that the memristor dynamics are much slower than the capacitor voltage dynamics. Moreover, the effect of design parameters on the cell dynamics is being investigated, showing how the scaling of the operating voltage, as well as a plethora of CNN variants –i.e., the ChuaYang and Full Range models–, can be implemented within the same design. Finally, the nonlinear conductance properties of real memristor devices are incorporated into the study, demonstrating interesting bifurcation phenomena between the cell monostability and bistability for specific parameter values.

11. ISCAS

    Sneak-Path Effect on Chimera States of Memristor-Coupled Chua Circuit Networks

    K. Tsakalos, V. Ntinas, P. Dimitrakis, and 2 more authors

    In 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023

    Abstract DOI 4

    The memristor crossbar architecture is a new technology that combines memory and computing on the same chip, finding numerous applications in modern bio-inspired computing systems. Recently, memristor-coupled Chua Circuit Networks (MCCNs) have been developed for the experimental confirmation of collective nonlinear phenomena, such as chimera states, that are also observed in the brain. For highly dense topologies, however, memristor crossbars can be prone to certain vulnerabilities. In this paper, we investigate the impact of sneak-path currents (SPCs) on the collective behaviors of chaotic oscillator networks, uncovering the network’s tolerance to various realistic memristor crossbar designs. Despite the fact that these states alter the synchronization regime map, our findings suggest that SPCs have no detrimental impact on the formation and stability of single or multiple chimera states. This coupling issue along with other possible challenges are thoroughly discussed with a focus on nonlinear dynamics, highlighting the reliability of memristor crossbars as a coupling mechanism for studying chimera states.

12. ISCAS

    Dynamics of a Memristive Bridge with Valence Change Mechanism (VCM) Devices

    D. Prousalis, V. Ntinas, I. Messaris, and 3 more authors

    In 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023

    Abstract DOI 3

    Biological synapses behave as dynamically-rich nonlinear elements, participating in complicated computing tasks through their adaptation due to external stimuli. Such adaptivity constitutes an intrinsic property of non-volatile memristor devices, which are also able to maintain their internal state, under zero input, enabling novel bio-inspired learning operations. In this work, a synaptic element based on a memristive bridge, containing two resistors and two memristors, is studied, aiming to investigate complex memristor-based topologies that may result in rich synaptic dynamics. The proposed memristive bridge allows the realization of both positive and negative synaptic weights, while an asymmetric tuning of a weight, stemming from memristor’s features and bridge topology, is demonstrated. In particular, by properly selecting the memristor’s position and polarity within the bridge, different tuning behaviors have been observed, showcasing versatile learning properties of the topology. Along with the synaptic weight tuning, the read overall process of the synaptic weight, necessary for inference operations, is also investigated. We explore the dynamics of the bridge via numerical simulations.

13. ISCAS

    Time-Based Memristor Crossbar Array Programming for Stochastic Computing Parallel Sequence Generation

    N. Temenos, V. Ntinas, P. Sotiriadis, and 1 more author

    In 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023

    Abstract DOI 3

    The so far dominant Von Neumann architecture is being challenged by the energy demanding communication bottle-neck between processing and memory units. To address this issue, in-memory computing is employed for their co-location, with memristive crossbar arrays playing an important role towards this goal. Motivated by the above, this work introduces a timing-based programming of a memristor crossbar array for sequence generation in Stochastic Computing (SC). Its operation principle is based on the stochastic nature of the memristor devices forming the crossbar array, where their programming is regulated by the switching probability that follows the Poisson distribution, controlled by pulse amplitude and duration. The timing-based programming of the proposed crossbar array increases the discretization levels of the output probability values, thereby offering more accurate control when compared to programming schemes that consider only the pulse amplitude. The memristor’s stochasticity along with the crossbar’s inherent parallelism opens the in-memory design space allowing SC elements to be used as sequences are generated efficiently. Simulation results on different programming pulse-width precisions highlight the proposed crossbar’s effectiveness in sequence generation, supported by mean absolute error (MAE) results in a standard SC arithmetic operation. Process variations stemming from the crossbar array affecting the sequence generation in SC are investigated.

2022

1. TCAS-I

   Memristor Crossbar Arrays Performing Quantum Algorithms

   I. Fyrigos, V. Ntinas, N. Vasileiadis, and 4 more authors

   IEEE Transactions on Circuits and Systems I: Regular Papers, 2022

   Abstract DOI 24

   There is a growing interest in quantum computers and quantum algorithm development. It has been proved that ideal quantum computers, with zero error rates and large decoherence times, can solve problems that are intractable for today’s classical computers. Quantum computers use two resources, superposition and entanglement, that have no classical analog. Since quantum computer platforms that are currently available comprise only a few dozen of qubits, the use of quantum simulators is essential in developing and testing new quantum algorithms. We present a novel quantum simulator based on memristor crossbar circuits and use them to simulate well-known quantum algorithms, namely the Deutsch and Grover quantum algorithms. In quantum computing the dominant algebraic operations are matrix-vector multiplications. The execution time grows exponentially with the simulated number of qubits, causing an exponential slowdown in quantum algorithm execution using classical computers. In this work, we show that the inherent characteristics of memristor arrays can be used to overcome this problem and that memristor arrays can be used not only as independent quantum simulators but also as a part of a quantum computer stack where classical computers accelerators are connected. Our memristive crossbar circuits are re-configurable and can be programmed to simulate any quantum algorithm.

2. TCAS-II

   Towards Simplified Physics-Based Memristor Modeling of Valence Change Mechanism Devices

   V. Ntinas, A. Ascoli, I. Messaris, and 4 more authors

   IEEE Transactions on Circuits and Systems II: Express Briefs, 2022

   Abstract DOI 28

   Memristors are promising nanoelectronic devices for the implementation of future AI-driven sensor-processor electronic systems, which are essential for the ongoing digitalization of our world. Accurate and computationally cost-effective models for the manufactured memristors are essential for the design of such systems, especially for the simulation of large circuits. In this work we address the simplification of the JART memristor model, a generic physics-based model of Valence Change Mechanism (VCM) memristors which accurately describes the dynamic behavior of fabricated memristor devices. Furthermore, the proposed model and simplification methodology have the potential to capture the dynamics of a wide range of memristor devices. Importantly, the implicit description of the current through the memristor is replaced by an explicit mathematical relationship. The proper reproduction of memristor dynamics, verified by applying the system-theoretic Dynamic Route Map (DRM) graphical analysis tool, applicable to first-order systems, can be observed through the proposed simplified model and enables the time-efficient simulation of large arrays of VCM devices.

3. IJUC

   On Edge Image Processing Acceleration with Low Power Neuro-Memristive Segmented Crossbar Array Architecture

   N. Vasileiadis, V. Ntinas, P. Karakolis, and 2 more authors

   International Journal of Unconventional Computing, 2022

   Abstract 3

   Computational acceleration for image processing tasks on the edge is becoming increasingly important for many applications. This work presents a new neuro-inspired architecture which incorporates in-memory computing properties for image processing complex computational tasks in addition to analog memory. The proposed architecture was based on segmented crossbar topology, which, as it turns out, reduces many phenomena that affect the performance on such systems. The extended architectural capabilities of this structure were also tested in a systematic analysis that was performed on a novel depth map extraction application from a single defocused image. All results were validated through Spice simulations using a novel moving barrier mem-ristor model.

4. TNANO

   Simulation of Low Power Self-Selective Memristive Neural Networks for In Situ Digital and Analogue Artificial Neural Network Applications

   C. Tsioustas, P. Bousoulas, J. Hadfield, and 6 more authors

   IEEE Transactions on Nanotechnology, 2022

   Abstract DOI 23

   Self-selective memory devices are considered promising candidates for suppressing the undesired sneak path currents that appear within crossbar memory structures and compromise their performance during the write and read operations. Along these lines, in this work we present forming free SiO_\mathbf2-based resistive devices with inherent self-selection and self-compliance properties. The devices can operate in dual mode, since they can perform volatile threshold switching and non-volatile bipolar resistive behavior by regulating the external voltage amplitude. Interestingly, the devices exhibit low operating voltage (\sim260 – 360 mV) and quick response time (\sim100 ns). A comprehensive model is then developed in order to interpret this unique feature and provide valuable insights into the underlying physical mechanisms. Additionally, self-activated neural networks are theoretically investigated by performing in-situ digital and analog computations, whereas the calculated outcomes are compared with traditional neural networks with transistors as selecting elements. More specifically, a logic NAND gate and supervised learning upon the MNIST dataset is performed, while the proposed neural network architecture is tuned differently according to the application. Notably, the acquired results are comparable with the respective data where selectors have been employed, indicating the promising aspects of the proposed memristive devices. Moreover, a thorough analysis is carried out regarding the correlation between the device’s linearity and the recognition’s accuracy score, offering valuable insights. The proposed architecture paves the way for the development of energy-efficient artificial neural network computing architectures with tunable properties.

5. JJAP

   Material Design Strategies for Emulating Neuromorphic Functionalities with Resistive Switching Memories

   P. Bousoulas, S. Kitsios, T. Chatzinikolaou, and 5 more authors

   Japanese Journal of Applied Physics, 2022

   Abstract DOI 10

   Abstract Nowadays, the huge power consumption and the inability of the conventional circuits to deal with real-time classification tasks have necessitated the devising of new electronic devices with inherent neuromorphic functionalities. Resistive switching memories arise as an ideal candidate due to their low footprint and small leakage current dissipation, while their intrinsic randomness is smoothly leveraged for implementing neuromorphic functionalities. In this review, valence change memories (VCM) or conductive bridge memories (CBRAM) for emulating neuromorphic characteristics are demonstrated. Moreover, the impact of the device structure and the incorporation of Pt nanoparticles (NPs) is thoroughly investigated. Interestingly, our devices possess the ability to emulate various artificial synaptic functionalities, including paired-pulsed facilitation and paired-pulse depression, long-term plasticity and four different types of spike-dependent plasticity. Our approach provides valuable insights from a material design point of view towards the development of multifunctional synaptic elements that operate with low power consumption and exhibit biological-like behavior.

6. Electronics

   Chemical Wave Computing from Labware to Electrical Systems

   T. Chatzinikolaou, I. Fyrigos, V. Ntinas, and 6 more authors

   Electronics, 2022

   Abstract DOI 10

   Unconventional and, specifically, wave computing has been repeatedly studied in laboratory based experiments by utilizing chemical systems like a thin film of Belousov–Zhabotinsky (BZ) reactions. Nonetheless, the principles demonstrated by this chemical computer were mimicked by mathematical models to enhance the understanding of these systems and enable a more detailed investigation of their capacity. As expected, the computerized counterparts of the laboratory based experiments are faster and less expensive. A further step of acceleration in wave-based computing is the development of electrical circuits that imitate the dynamics of chemical computers. A key component of the electrical circuits is the memristor which facilitates the non-linear behavior of the chemical systems. As part of this concept, the road-map of the inspiration from wave-based computing on chemical media towards the implementation of equivalent systems on oscillating memristive circuits was studied here. For illustration reasons, the most straightforward example was demonstrated, namely the approximation of Boolean gates.

7. NANO

   Stochastic Resonance Effect in Binary STDP Performed by RRAM Devices

   E. Salvador, R. Rodriguez, J. Martin-Martinez, and 6 more authors

   In 2022 IEEE 22nd International Conference on Nanotechnology (NANO), 2022

   Abstract DOI 2

   The beneficial role of noise in the binary spike time dependent plasticity (STDP) learning rule, when implemented with memristors, is experimentally analyzed. The two memristor conductance states, which emulate the neuron synapse in neuromorphic architectures, can be better distinguished if a gaussian noise is added to the bias. The addition of noise allows to reach memristor conductances which are proportional to the overlap between pre- and post-synaptic pulses.

8. ICECS

   Analytical Study of the Fading Memory Phenomenon in a TaOx Memristor Model

   I. Messaris, A. Ascoli, A. Demirkol, and 2 more authors

   In 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2022

   Abstract DOI 2

   This paper presents a theoretical study of the fading memory phenomenon in a TaOx-based memristor, manufactured and modeled at Hewlett-Packard Labs. Specifically, we derive a set of equations that can be used to characterize its steady-state response to a high-frequency zero-mean periodic square-wave voltage stimulus. Our results reveal a hidden property of the Dynamic Route Map (DRM) system-theoretic analysis tool, i.e. its capability to predict accurately the mean value of the state variable oscillation in first-order non-volatile memristors, at steady-state, as a function of the input amplitude alone. This DRM property may be useful in real-world memristor-based applications, where voltage pulses are most often employed to modulate the states of practical memristor devices.

9. LASCAS

   Memristor-Based Oscillator for Complex Chemical Wave Logic Computations: Fredkin Gate Paradigm

   T. Chatzinikolaou, I. Fyrigos, V. Ntinas, and 6 more authors

   In 2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS), 2022

   Abstract DOI 1

   Concurrent computational machines have not provided in all cases ideal or even efficient implementations for a range of complex and computationally expensive problems. Thus, the utilization of unconventional computing systems, often inspired by biological processes, is widely investigated. One characteristic category of these systems is chemical computers that encode reactants’ spatial concentrations as information and employ wave-fronts’ propagation as means of computation. The most widely known and used reaction is the Belousov-Zhabotinsky (BZ) that perfectly demonstrates non-equilibrium thermodynamics. Motivated by these chemical computers and to further enhance their analysis, a digital-twin was developed and tested. Namely MemRC, a memristor based oscillator is presented here. The ability of the proposed electrical circuitry to mimic the computational abilities of a chemical system was demonstrated by the realization of Fredkin gate operations. The results of the electrical system are in good agreement with results from simulation of the chemical medium and from laboratory experiments. Furthermore an important advantage of the electrical system is the significant acceleration of the computations that can enable further testing of possible implementations.

10. ISCAS

    Compact Thermo-Diffusion Based Physical Memristor Model

    I. Fyrigos, T. Chatzinikolaou, V. Ntinas, and 7 more authors

    In 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

    Abstract DOI 19

    The threshold switching effect is critical in memristor devices for a range of applications, from crossbar design reliability to simulating neuromorphic features using artificial neural networks. The rich inherit dynamics of a metallic conductive filament (CF) formation are thought to be linked to this characteristic. Simulating these dynamics is necessary to develop an accurate memristor model. In this work we present a compact memristor model that utilizes the drift, diffusion and thermo-diffusion effects. These three effects are taken into consideration to derive the switching behavior of a memristor. The resistance of a memristor is calculated based on the evolution of a truncated cone shaped filament. The objective of this model is to achieve a realistic integration of switching mechanisms of the memristor device, while minimizing the overhead on computing resources and being compatible with circuit design tools. The model incorporates the effect of thermo-diffusion on the switching pattern, providing a different perception of the ionic transport processes, which enable the unipolar switching. SPICE simulation results provide an exact match with experimental results of Metal-Insulator-Metal (MIM) memristive devices of Ag/Si2/SiO2.07/Pt nanoparticles (NPs) configuration.

11. ISCAS

    Wave Cellular Automata for Computing Applications

    T. Chatzinikolaou, I. Fyrigos, V. Ntinas, and 6 more authors

    In 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

    Abstract DOI 12

    There is a continuous urge for higher efficiency in conventional computing systems, driven by an ever-growing demand for these systems’ complexity to be able to match the one of convoluted and challenging problems. However, this type of problems has formulated the benchmarks for unconventional computing systems to validate their emerging applicability and prove their effectiveness. Towards this path, Cellular Automata (CAs) have been established as a promising mathematical tool for simulating physical processes and demonstrated a favourable methodology for effectively implementing computations in hardware by taking advantage of their inherent parallelism. Representing CAs with oscillating memristive networks could further enhance the performance of these systems, by incorporating the rich dynamics evident in memristors and their strong memory and computing features. In this work, a wave generator circuit has been designed with low-voltage fabricated CBRAM devices, that is able to act as a Wave Cellular Automaton (WCA). These wave generation units are located on a grid with adjusting multi-directional interconnections between neighbors. In addition to that, the ability to reconFigure the amount of such units that influence each other, facilitates the propagation of voltage signals through the grid following wave propagation features. An example of this computational domain is presented with the realization of complex logic gates on the grid of WCAs.

12. ISCAS

    Beneficial Role of Noise in Hf-Based Memristors

    R. Rodriguez, J. Martin-Martinez, E. Salvador, and 6 more authors

    In 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022

    Abstract DOI 9

    The beneficial role of noise in the performance of Hf-based memristors has been experimentally studied. The addition of an external gaussian noise to the bias circuitry positively impacts the memristors characteristics by increasing the OFF/ON resistances ratio. The known stochastic resonance effect has been observed, when changing the standard deviation of the noise. The influence of the additive noise on the memristor current-voltage characteristic and on the set and reset related parameters are also presented.

2021

1. CSF

   Multi-Level Resistance Switching and Random Telegraph Noise Analysis of Nitride Based Memristors

   N. Vasileiadis, P. Loukas, P. Karakolis, and 6 more authors

   Chaos, Solitons & Fractals, 2021

   Abstract DOI 33

   Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices exhibit usually memristive properties with many discrete resistance levels and implement artificial synapses. The last years, researchers have demonstrated memristive chips as accelerators in computing, following new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM or MIS structures. Understanding of the mechanism and the dynamics of resistance switching is very critical for the modeling and use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes, respectively. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and appropriate current compliance setting, multilevel resistance operation can be achieved. Furthermore, a flexible tuning protocol for multi-level resistance switching was developed applying appropriate SET/RESET pulse sequences. Retention and random telegraph noise measurements performed at different resistance levels. The present results reveal the attractive properties of the examined devices.

2. Materials

   In-Memory-Computing Realization with a Photodiode/Memristor Based Vision Sensor

   N. Vasileiadis, V. Ntinas, G. Sirakoulis, and 1 more author

   Materials, 2021

   Abstract DOI 29

   State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiNx) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed.

3. Biosystems

   Light Sensitive Belousov–Zhabotinsky Medium Accommodates Multiple Logic Gates

   M. Tsompanas, I. Fyrigos, V. Ntinas, and 2 more authors

   Biosystems, 2021

   Abstract DOI 22

   Computational functionality has been implemented successfully on chemical reactions in living systems. In the case of Belousov–Zhabotinsky (BZ) reaction, this was achieved by using collision-based techniques and by exploiting the light sensitivity of BZ. In order to unveil the computational capacity of the light sensitive BZ medium and the possibility to implement re-configurable logic, the design of multiple logic gates in a fixed BZ reservoir was investigated. The three basic logic gates (namely NOT, OR and AND) were studied to prove the Turing completeness of the architecture. Namely, all possible Boolean functions can be implemented as a combination of these logic gates. Nonetheless, a more complicated logic function was investigated, aiming to illustrate further capabilities of a fixed size BZ reservoir. The experiments executed within this study were implemented with a Cellular Automata (CA)-based model of the Oregonator equations that simulate excitation and wave propagation on a light sensitive BZ thin film. Given that conventional or von Neumann architecture computations is proved possible on the proposed configuration, the next step would be the realization of unconventional types of computation, such as neuromorphic and fuzzy computations, where the chemical substrate may prove more efficient than silicon.

4. NonlDyn

   Cellular Automata Implementation of Oregonator Simulating Light-Sensitive Belousov–Zhabotinsky Medium

   M. Tsompanas, I. Fyrigos, V. Ntinas, and 2 more authors

   Nonlinear Dynamics, 2021

   Abstract DOI 21

   Cellular automata (CA) have been used to simulate a variety of different chemical, biological and physical phenomena. Their ability to emulate complex dynamics, emerging from simple local interactions of their elementary cells, made them a strong candidate for mimicking these phenomena, especially when accelerated computation through parallelization is required. Belousov–Zhabotinsky (BZ) is a class of chemical reactions that due to their potential as nonlinear chemical oscillators, have inspired scientists to use them as chemical computers. The Oregonator equations, which approximate the dynamics of BZ reactions, were implemented here using CA methods. This new modelling approach (CA-based Oregonator) was tested in terms of accuracy and efficiency against previous models and laboratory-based experimental results, while the benefits of this method were outlined. It was observed that the results from the CA-based Oregonator are in good agreement with both modelled and laboratory experiments. The main advantage of this method can be summarized as the acceleration achieved in current implementations (serial computers), but also towards potential future implementations in massively parallel computational systems (like field-programmable gate array hardware and nano-neuromorphic circuits) that have been proved to be good substrates for accelerating the implemented CA models.

5. TNANO

   Understanding the Role of Defects in Silicon Nitride-Based Resistive Switching Memories Through Oxygen Doping

   N. Vasileiadis, P. Karakolis, P. Mandylas, and 9 more authors

   IEEE Transactions on Nanotechnology, 2021

   Abstract DOI 61

   Resistive memories are promising candidates for replacing current nonvolatile memories and realize storage class memories. Moreover, they have memristive properties, with many discrete resistance levels and implement artificial synapses. The last years researchers have demonstrated RRAM chips used as accelerators in computing, following the new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM structures. Understanding of the switching mechanism is very critical for the modeling and the use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes respectively. Next, we dope nitride with oxygen in order to introduce and modify the intrinsic nitride defects. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and by setting the appropriate current compliance, the operation condition of the RRAM cells can be tuned. Furthermore, resistance change can be obtained using appropriate SET/RESET pulsing sequences allowing the use of the devices in computing acceleration application. Impedance spectroscopy measurements clarify the presence of different mechanisms during SET and RESET. We prove through a customized measurement set-up and the appropriate control software that the initial charge-storage in the intrinsic nitride traps governs the resistance change.

6. CSF

   Memristive Learning Cellular Automata for Edge Detection

   R. Karamani, I. Fyrigos, K. Tsakalos, and 3 more authors

   Chaos, Solitons & Fractals, 2021

   Abstract DOI 29

   Memristors have been utilized as an unconventional computational substrate and gained interest as a medium to implement neuromorphic computations. A mathematical model that also proved its potential is Learning Cellular Automata, that is an amalgam of Cellular Automata and Learning Automata. The realization of the common characteristics of memristive circuits and Learning Cellular Automata can only lead to their combination. Namely, both manage to blend storage and processing capabilities in their basic entity. This study involves the definition of memristive circuits that realize the computing behavior of Learning Cellular Automata. An example of this methodology is provided with the description of the implementation of edge detection for image processing.

7. TCAS-II

   Power-Efficient Noise-Induced Reduction of ReRAM Cell’s Temporal Variability Effects

   V. Ntinas, A. Rubio, G. Sirakoulis, and 6 more authors

   IEEE Transactions on Circuits and Systems II: Express Briefs, 2021

   Abstract DOI 30

   Resistive Random Access Memory (ReRAM) is a promising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commercialization, mainly owing to the fact that the high fabrication variations and the stochastic switching of the manufactured ReRAM devices cause high Bit Error Rate (BER). Given that ReRAM devices are nonlinear elements, the nonlinear phenomenon of Stochastic Resonance (SR), which defines that an input disturbance with specific characteristics can improve the total performance of the nonlinear system, is used to reduce the ReRAM cell’s BER. Thus, in this brief, the BER of a single ReRAM cell is explored, using the Stanford PKU model, and is improved after the application of specific additive input noise. The power dissipation of the proposed approach is also evaluated and compared with the consideration of higher amplitude writing pulses in the lack of noise, showing that the proposed noise-induced technique can decrease the BER without the excessive increase of the power dissipation. As a first step, towards the experimental verification of the proposed method, noise-induced measurements on a single fabricated ReRAM device are also performed. Overall, the presented results of the BER reduction with low power dissipation, reaching up to 3.26\times less power consumption considering 100 ns writing pulses, are encouraging for ReRAM designers, delivering a circuit-level solution against the device-level problem.

8. TNANO

   Quantum Mechanical Model for Filament Formation in Metal-Insulator-Metal Memristors

   I. Fyrigos, V. Ntinas, G. Sirakoulis, and 2 more authors

   IEEE Transactions on Nanotechnology, 2021

   Abstract DOI 18

   Metal-Insulator-Metal type memristors as emergent nano-electronic devices have been successfully fabricated and used in non-conventional and neuromorphic computing systems in the last years. Several behavioral or physical based models have been developed to explain their operation and to optimize their fabrication parameters. Among them, the resistance switching of the insulating layer due to the formation of conductive filaments is the most well respected and experimentally proven. All existing memristor models are trade-offs between accuracy, universality and realism, but, to the best of our knowledge, none of them is purely characterized as quantum mechanical, despite the fact that quantum mechanical processes are a major part of the memristor operation. In this paper, we employ quantum mechanical methods to develop a complete and accurate filamentary model for the resistance variation during memristor’s operating cycle. More specifically, we apply quantum walks to model and compute the motion of atoms forming the filament, tight-binding Hamiltonians to capture the filament structure and the Non-Equilibrium Green’s Function (NEGF) method to compute the conductance of the device. Furthermore, we proceeded with the parallelization of the overall model through Graphical Processing Units (GPUs) to accelerate our computations and enhance the model’s performance adequately. Our simulation results successfully reproduce the resistive switching characteristics of memristors devices, match with existing fabricated devices experimental data, prove the efficacy and robustness of the proposed model in terms of multi-parameterization, and provide a new and useful insight into its operation.

9. MWSCAS

   Memristor-Based Probabilistic Cellular Automata

   V. Ntinas, G. Sirakoulis, and A. Rubio

   In IEEE Midwest Symposium on Circuits and Systems (MWSCAS), 2021

   Abstract DOI 11

   In conventional computing systems, the device imperfections constitute the main hindrance on the commercialization of emerging technologies. On the other hand, in alternative computing paradigms, generally acknowledged as unconventional computing, device imperfections can be utilized to achieve complex behaviors that are computationally hard for conventional computers. In Probabilistic Cellular Automata (PCA), complex collective phenomena emerge through simplistic locally coupled probabilistic entities, named as cells. However, the hardware implementations of PCA are highly imposed by the required randomness generation within each PCA cell. In this paper, a novel hardware design of 1-D PCA with Memristors is proposed, utilizing device’s non-volatile storage and its unprecedented voltage-controlled probabilistic switching behavior. The necessary theoretical framework for memristor-based PCA (MemPCA) is defined. Moreover, the randomness of MemPCA for various switching probability levels is evaluated through the entropy of generated sequences and the collective effect to all 1-D elementary CA rules is presented, highlighting the effectiveness of memristor as a source of entropy.

10. CNNA

    Multifunctional Spatially-Expanded Logic Gate for Unconventional Computations with Memristor-Based Oscillators

    T. Chatzinikolaou, I. Fyrigos, V. Ntinas, and 5 more authors

    In 2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), 2021

    Abstract DOI 11

    There is a great variety of unconventional computing approaches trying to compete with and even surpass the classical computers in providing a solution to high complexity problems. Unconventional computation functionality has been verified and implemented successfully on chemical reactions, paving the way to the development of Chemical Computers. This functionality is investigated here, aiming to transfer chemical reaction’s working principle on a circuit capable of processing information, involving the interaction of propagating voltage signals in a geometrically constrained electrical medium. In this work such a circuit has been developed utilizing Memristor-Resistor-Capacitor (MemRC) oscillators and their computing capabilities have been verified by demonstrating multiple Boolean logic calculations in the same medium. More specifically, a variety of Boolean gates is implemented in a versatile topology of oscillating nodes, exploiting the same electrical medium geometry.

11. CNNA

    Memristive Oscillatory Networks for Computing: The Chemical Wave Propagation Paradigm

    T. Chatzinikolaou, I. Fyrigos, V. Ntinas, and 5 more authors

    In 2021 17th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), 2021

    DOI 7
12. ICECS

    Margolus Chemical Wave Logic Gate with Memristive Oscillatory Networks

    T. Chatzinikolaou, I. Fyrigos, V. Ntinas, and 6 more authors

    In 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2021

    Abstract DOI 4

    As conventional computing systems are striving to increase their performance in order to compensate for the growing demand of solving difficult problems, emergent and unconventional computing approaches are being developed to provide alternatives on efficiently solving a plethora of those complex problems. Chemical computers which use chemical reactions as their main characteristic can be strong candidates for these new approaches. Oscillating networks of novel nano-devices like memristors are also able to perform calculations with their rich dynamics and their strong memory and computing features. In this work, the combination of the aforementioned approaches is achieved that capitalizes on the threshold switching mechanism of low-voltage CBRAM devices to establish a memristive oscillating circuitry that is able to act as a chemical reaction - diffusion system through the network nodes’ interactions. The propagation of the voltage signals throughout the medium can be used to establish a mechanism for specific logic operations according to the desired logic function leading to the nano-implementation of Margolus chemical wave logic gate.

13. ISCAS

    Emergence of Chimera States with Re-Programmable Memristor Crossbar Arrays

    K. Tsakalos, V. Ntinas, R. Karamani, and 6 more authors

    In 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021

    Abstract DOI 9

    The time series of the brain are usually characterized by the co-existence of synchronized and desynchronized behaviors. This kind of behavior is related to normal and disorderly functions of the brain. One of the suggested mechanisms to understand thoroughly this behavior are chimera states, which are characterized by the coincidence of coherent and incoherent dynamics that can be exploited through networks of symmetrically coupled identical oscillators. In this work, ring-based networks of Chua’s circuits, the simplest electronic oscillators that perform chaotic and well-known bifurcation phenomena, have been extensively studied in memristive crossbars (Xbar), revealing various collective spatio-temporal behaviors, such as chimera states. With respect to different Xbar connectivities and via SPICE-level circuit simulations, the proposed Xbar system proves its efficacy to reproduce spatio-temporal patterns spanning from complete synchronization and chimera states up to fully chaotic states.

14. ISCAS

    Memristor Crossbar Design Framework for Quantum Computing

    I. Fyrigos, T. Chatzinikolaou, V. Ntinas, and 4 more authors

    In 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021

    Abstract DOI 7

    Over the last years there has been significant progress in the development of quantum computers. It has been demonstrated that they can accelerate the solution of various problems exponentially compared to today’s classical computers, harnessing the properties of superposition and entanglement, two resources that have no classical analog. Since quantum computer platforms that are currently available comprise only a few tenths of qubits, as well as the access to a fabricated quantum computer is time limited for the majority of researchers, the use of quantum simulators is essential in developing and testing new quantum algorithms. Taking inspiration from previous work on developing a novel quantum simulator based on memristor crossbar circuits, in this work, a framework that automates the circuit design of emulated quantum gates is presented. The proposed design framework deals with the generation and programming of memristor crossbar configuration that incor-porates the desirable quantum circuit, leading to a technology agnostic design tool. To such a degree, various quantum gates can be efficiently emulated on memristor crossbar configurations for various types of memristive devices, aiming to assist and accelerate the fabrication process of a memristor based quantum simulator.

15. ISCAS

    A New 1P1R Image Sensor with In-Memory Computing Properties Based on Silicon Nitride Devices

    N. Vasileiadis, V. Ntinas, I. Fyrigos, and 6 more authors

    In 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021

    Abstract DOI 24

    Research progress in edge computing hardware, capable of demanding in-the-field processing tasks with simultaneous memory and low power properties, is leading the way towards a revolution in IoT hardware technology. Resistive random access memories (RRAM) are promising candidates for replacing current non-volatile memories and realize storage class memories, but also due to their memristive nature they are the perfect candidates for in-memory computing architectures. In this context, a CMOS compatible silicon nitride (SiN) device with memristive properties is presented accompanied by a data-fitted model extracted through analysis of measured resistance switching dynamics. Additionally, a new phototransistor-based image sensor architecture with integrated SiN memristor (1P1R) was presented. The in-memory computing capabilities of the 1P1R device were evaluated through SPICE-level circuit simulation with the previous presented device model. Finally, the fabrication aspects of the sensor are discussed.

16. ICEIC

    True Random Number Generator Based on Multi-State Silicon Nitride Memristor Entropy Sources Combination

    N. Vasileiadis, P. Dimitrakis, V. Ntinas, and 1 more author

    In 2021 International Conference on Electronics, Information, and Communication (ICEIC), 2021

    Abstract DOI 22

    True random number generators (TRNG) are key components in information security systems. Moreover, in the era of the internet of things (IoT), the demands on smaller, faster, simpler and more power efficient TRGN circuits increased. Meeting these requirements, resistance switching devices, used also as resistive memory cells (ReRAMs), are attractive candidates to implement entropy sources due to their inherent stochasticity. In this work, we present a novel design of TRNG hardware based on a silicon nitride memristor. Multi-state currents are utilized as different entropy sources increasing the overall entropy of the circuit. A post-processing of the generated bitstreams was made with a simple Xorshift combinational logic circuit. The robustness of the proposed design is verified with NIST randomness tests.

2020

1. Access

   Probabilistic Resistive Switching Device Modeling Based on Markov Jump Processes

   V. Ntinas, A. Rubio, and G. Sirakoulis

   IEEE Access, 2020

   Abstract DOI 18

   In this work, a versatile mathematical framework for multi-state probabilistic modeling of Resistive Switching (RS) devices is proposed for the first time. The mathematical formulation of memristor and Markov jump processes are combined and, by using the notion of master equations for finite-states, the inherent probabilistic time-evolution of RS devices is sufficiently modeled. In particular, the methodology is generic enough and can be applied for N states; as a proof of concept, the proposed framework is further stressed for both a two-state RS paradigm, namely N = 2, and a multi-state device, namely N = 4. The presented I-V results demonstrate in a qualitative and quantitative manner, adequate matching with other modeling approaches.

2. ISCAS

   Memristive Oscillatory Circuits for Resolution of NP-Complete Logic Puzzles: Sudoku Case

   T. Chatzinikolaou, I. Fyrigos, R. Karamani, and 4 more authors

   In 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020

   Abstract DOI 15

   Memristor networks are capable of low-power and massive parallel processing and information storage. Moreover, they have presented the ability to apply for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. Beyond the memory and conventional computing architectures, memristors are widely studied in circuits aiming for increased intelligence that are suitable to tackle complex problems in a power and area efficient manner, offering viable solutions oftenly arriving also from the biological principles of living organisms. In this paper, a memristive circuit exploiting the dynamics of oscillating networks is utilized for the resolution of very popular and NP-complete logic puzzles, like the well-known “Sudoku”. More specifically, the proposed circuit design methodology allows for appropriate usage of interconnections’ advantages in a oscillation network and of memristor’s switching dynamics resulting to logic-solvable puzzle-instances. The reduced complexity of the proposed circuit and its increased scalability constitute its main advantage against previous approaches and the broadly presented SPICE based simulations provide a clear proof of concept of the aforementioned appealing characteristics.

3. ECCTD

   Implementation and Optimization of Chemical Logic Gates Using Memristive Cellular Automata

   I. Fyrigos, V. Ntinas, M. Tsompanas, and 4 more authors

   In 2020 European Conference on Circuit Theory and Design (ECCTD), 2020

   Abstract DOI 9

   By utilizing biologically inspired approaches, a wide range of complex and computationally intensive problems can be transformed to simpler and more appropriate forms to be easily solved by unconventional computing systems. A well-known computing platform with such characteristics is the Cellular Automata paradigm, where a spatial-extended network of nodes, with local interactions, exhibit emerging computations. In such CA networks, the application of nanodevices, like memristors, with inherent novel abilities, like memory storing and computing capabilities, together with nonlinear interactions is promising for the advancement of computation. In this work, a memristor-based Cellular Automaton (MemCA) is developed for the implementation and optimization of topological chemical logic gates. The proposed MemCA is inspired by the behaviour of the biological organism Physarum Polycephalum that firstly spreads to reach nutrients in its environment and afterwards shrinks to optimize its energy requirements, while performing biochemical oscillations to accomplish these tasks. In a similar way, the MemCA simulates Physarum’s spreading to perform the spatial operation of the chemical logic gate, while Physarum’s shrinking was utilised to further optimise the required area of the gate.

4. MOCAST

   Memristive Learning Cellular Automata: Theory and Applications

   R. Karamani, I. Fyrigos, V. Ntinas, and 6 more authors

   In 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2020

   Abstract DOI 7

   Memristors are novel non volatile devices that manage to combine storing and processing capabilities in the same physical place. Their nanoscale dimensions and low power consumption enable the further design of various nanoelectronic processing circuits and corresponding computing architectures, like neuromorphic, in memory, unconventional, etc. One of the possible ways to exploit the memristor’s advantages is by combining them with Cellular Automata (CA). CA constitute a well known non von Neumann computing architecture that is based on the local interconnection of simple identical cells forming N-dimensional grids. These local interconnections allow the emergence of global and complex phenomena. In this paper, we propose a hybridization of the CA original definition coupled with memristor based implementation, and, more specifically, we focus on Memristive Learning Cellular Automata (MLCA), which have the ability of learning using also simple identical interconnected cells and taking advantage of the memristor devices inherent variability. The proposed MLCA circuit level implementation is applied on optimal detection of edges in image processing through a series of SPICE simulations, proving its robustness and efficacy.

5. ECCTD

   Neuromorphic Circuits on Segmented Crossbar Architectures with Enhanced Properties

   V. Ntinas, P. Karakolis, G. Sirakoulis, and 1 more author

   In 2020 European Conference on Circuit Theory and Design (ECCTD), 2020

   Abstract DOI 5

   General purpose processors have been used in a wide variety of computational and modeling applications. However, their performance is not always sufficient when simulating neural networks, which are widely applied to signal processing and pattern recognition. In this work, after a systematic study of the computational requirements of such neural networks and an exploration of the available hardware solutions through which the aforementioned applications can be accelerated, a modern neuromorphic circuit structure is proposed with its operation attributed to memristor devices and segmented crossbar architecture. By coupling these two technologies, neuromorphic circuits have been designed with high computational performance versus integration scale and power consumption. An Ex-Situ training paradigm based on the advantageous memristor segmented crossbar is proposed, using the MNIST dataset and resulting at 97% accuracy. At the same time, a novel memristor tuning method on 1D1M configuration has been developed, able to increase the memristor programming speed.

6. ICEIC

   Cellular Automata Coupled with Memristor Devices: A Fine Unconventional Computing Paradigm

   V. Ntinas, R. Karamani, I. Fyrigos, and 6 more authors

   In 2020 International Conference on Electronics, Information, and Communication (ICEIC), 2020

   Abstract DOI 9

   Cellular Automata (CAs), a ubiquitous computational tool proposed by John von Neumann, illustrate how great complexity emerges from simple rules of dynamical transitions between space and time interconnected simplistic entities. CAs perform as mathematical computation models, but also they are a powerful medium to model nature and natural systems. As a computational platform, CAs come with unified memory and computation in the same physical area, attributed as a strong candidate against the limitations of data transfer, known as the von Neumann bottleneck. On the other hand, Memristors with their inherent Computing-In-Memory compatibility, can be easily considered as appropriate nanoelectronic devices to be coupled with CAs towards an energy and time efficient computational paradigm. In particular, CA present a vast area of applications, comprising various NP-complete hard to be solved problems arriving from computer science field, like the well-known Shortest Path, Bin Packing, Knapsack and Max-clique problems, as well as physical, chemical and biological processes and phenomena, such as epileptic seizures in relation with healthy and pathogenic brain regions and, moreover, real life applications like pseudorandom number generation and simplistic, but with highly complex behavior, models like the famous Game of Life. The outcome of employing Memristors in CAs applications is promising in terms of parallelization, power consumption, scalability, reconfigurability, and high computing performance.

2019

1. TCAS-II

   A Complete Analytical Solution for the On and Off Dynamic Equations of a TaO Memristor

   V. Ntinas, A. Ascoli, R. Tetzlaff, and 1 more author

   IEEE Transactions on Circuits and Systems II: Express Briefs, 2019

   Abstract DOI 22

   In this brief we provide a complete analytical model for the time evolution of the state of a real-world memristor under any dc stimulus and for all initial conditions. The analytical dc model is derived through the application of mathematical techniques to Strachan’s accurate mathematical description of a tantalum oxide nano-device from Hewlett Packard Labs. Under positive dc inputs the state equation of the Strachan model can be solved analytically, providing a closed-form expression for the device memory state response. However, to the best of our knowledge, the analytical integration of the state equation of the Strachan model under dc inputs of negative polarity is an unsolved mathematical problem. In order to bypass this issue, the state evolution function is first expanded in a series of Lagrange polynomials, which reproduces accurately the original model predictions on the device off-switching kinetics. The solution to the resulting state equation approximation may then be computed analytically by applying methods from the field of mathematics. Our full analytical model matches both qualitatively and quantitatively the tantalum oxide memristor response captured by the original differential algebraic equation set to typical stimuli of interest such as symmetric and asymmetric pulse excitations. It is further insensitive to the convergence issues that typically arise in the numerical integration of the original model, and may be easily integrated into software programs for circuit synthesis, providing designers with a reliable tool for exploratory studies on the capability of a certain circuit topology to satisfy given design specifications.

2. Book

   Mimicking Physarum Space Exploration with Networks of Memristive Oscillators

   V. Ntinas, I. Vourkas, G. Sirakoulis, and 1 more author

   In Handbook of Memristor Networks, 2019

   Abstract DOI 5

   Physarum polycephalum’s foraging has been for a long time a real source of inspiration for scientists and researchers as it exhibits intrinsic optimization characteristics. When some sources of nutrients are present, Physarum connects these sources with its protoplasmic vascular network, along shortest path connections. This chapter presents the modeling of Physarum’s learning and adaptivity to periodic environmental changes by a memristor-based passive LC filter, and further demonstrates its computational capabilities through two different electronic approaches. Firstly, a circuit-level model of Physarum’s oscillatory internal motion mechanism is designed to emulate the local signal propagation and the expansion of its vascular network during biological shortest path finding experiments. Furthermore, an extension of this model in a system-level approach is presented, which introduces also the shrinking mechanism that Physarum performs to reduce its power consumption after it has reached every nutrient source within its environment. The proper functioning of both the aforementioned approaches was verified via circuit simulations in SPICE as well as MATLAB. Finally, the effect of environmental noise was integrated to the presented approaches, permitting their evaluation under more realistic circumstances closer to the biological experiments, with very interesting results.

3. ICECS

   Memristor Hardware Accelerator of Quantum Computations

   I. Fyrigos, V. Ntinas, G. Sirakoulis, and 2 more authors

   In 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019

   Abstract DOI 18

   Quantum computing and quantum computers are a major part of the second quantum revolution. Existing quantum algorithms can natively solve complex problems, such as the prime number factorization and searching of unstructured databases, in a fast and efficient way. The main obstacle towards building large and efficient quantum computers is decoherence, which produces errors that have to be continuously corrected using quantum error correcting codes. Beyond the realisation of quantum computing systems with actual quantum hardware, quantum algorithms have been developed based on quantum logic gates that can be described and utilised by classical computers and proper interfaces based on linear algebra operations. Furthermore, memristive grids have been proposed as novel nanoscale and low-power hardware accelerators for the time-consuming matrix-vector multiplication and tensor products. In this work, given that for quantum computations simulation, the matrix-vector multiplication is the dominant algebraic operation, we utilize the unprecedented characteristics of memristive grids to implement circuit-level quantum computations. Since all quantum computations can be mapped to quantum circuits, memristive grids can also be used as efficient quantum simulators, as classical/quantum interfaces and also as accelerators in mixed classical-quantum computing systems.

4. ICECS

   Noise-Induced Performance Enhancement of Variability-Aware Memristor Networks

   V. Ntinas, I. Fyrigos, G. Sirakoulis, and 4 more authors

   In 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019

   Abstract DOI 8

   Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to device-to-device and cycle-to-cycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for real-life demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the well-known non-linear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of non-linear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristor-based networks and memories.

5. NANOARCH

   Plasma Modified Silicon Nitride Resistive Switching Memories

   P. Karakolis, P. Normand, P. Dimitrakis, and 5 more authors

   In 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2019

   Abstract DOI 3

   In this article we present RRAM single-cells based on MIS devices utilizing LPCVD silicon nitride thin layer as resistive switching material. The thin SiN layer was modified by plasma in order to improve the switching characteristics and the overall performance of the memory cell. Extensive material and electronic device characterization are presented.

6. NANOARCH

   Experimental Investigation of Memristance Enhancement

   V. Ntinas, A. Rubio, G. Sirakoulis, and 2 more authors

   In 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2019

   Abstract DOI 9

   Memristor devices are two-terminal nanoscale circuit elements that exhibit nonvolatile information storing and can be manufactured in ultra-dense arrays with low-power operation. Although, theoretically, memristors are strong candidates for novel memory and computing applications, the fabricated devices show high variability, both device-to-device and cycle-to-cycle, such as varying switching behaviour and maximum (RMAX) and minimum (RMIN) resistance values. Those limitations in the device’s RMAX/RMIN ratio suppress the wide use of memristors in memory or logic applications, thus, this work presents the enhancement of this ratio on actual memristor devices, namely Knowm memristors, due to the introduction of external noise as a beneficial disturbance, following the nonlinear system phenomenon known as Stochastic Resonance.

7. ISCAS

   Wave Computing with Passive Memristive Networks

   I. Fyrigos, V. Ntinas, G. Sirakoulis, and 3 more authors

   In 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019

   Abstract DOI 15

   Since CMOS technology approaches its physical limits, the spotlight of computing technologies and architectures shifts to unconventional computing approaches. In this area, novel computing systems, inspired by natural and mostly nonelectronic approaches, provide also new ways of performing a wide range of computations, from simple logic gates to solving computationally hard problems. Reaction-diffusion processes constitute an information processing method, occurs in nature and are capable of massive parallel and low-power computing, such as chemical computing through Belousov-Zhabotinsky reaction. In this paper, inspired by these chemical processes and based on the wave-propagation information processing taking place in the reaction-diffusion media, the novel characteristics of the nanoelectronic element memristor are utilized to design innovative circuits of electronic excitable medium to perform both classical (Boolean) calculations and to model neuromorphic computations in the same Memristor-RLC (M-RLC) reconfigurable network.

8. ISCAS

   A Pragmatic Gaze on Stochastic Resonance Based Variability Tolerant Memristance Enhancement

   V. Ntinas, A. Rubio, G. Sirakoulis, and 1 more author

   In 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019

   Abstract DOI 5

   Stochastic Resonance (SR) is a nonlinear system specific phenomenon, which was demonstrated to lead to system unexpected (counter-intuitive) performance improvements under certain noise conditions. Memristor, on the other hand, is a fundamentally nonlinear circuit element, thus susceptible to benefit from SR, which recently came in the spotlight of the emerging technologies potential candidates. However, at this time, the variability exhibited by manufactured memristor devices within the same array constitutes the main hurdle in the road towards the commercialisation of memristor-based memories and/or computing units. Thus, in this paper, memristor SR effects are explored, assuming various memristor models, and SR-based memristance range enhancement, tolerant to device-to-device variability, is demonstrated. Our experiments reveal that SR can induce significant RMAX/RMIN ratio increase under up to 60% variability, getting as high as 3.4× for 29 dBm noise power.

9. MOCAST

   Memristive Circuits for the Simulation of the Earthquake Process

   G. Tastzoglou, V. Ntinas, I. Georgoudas, and 2 more authors

   In 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2019

   Abstract DOI 0

   In this study, a grid that consists of inductor-capacitor-memristor circuits has been developed to simulate earthquake propagation. The main advantage of the memristor device is its ability to remember its last state even when no voltage is applied to it. Due to this feature, the use of the memristor is favored in the proposed inductor-capacitor-memristor (LCM) circuit. The inductors and capacitors emulate the oscillation of the rocks, whereas the memristors engage the circuit’s energy loss and act as the memory that the data affecting the earthquake propagation process is stored. In the context of this study, the proposed circuit model is designed on the LTspice platform. Furthermore, it is tested and validated with real seismic data. Preliminary results are quite encouraging regarding the response of the proposed model.

2018

1. TNNLS

   Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator

   V. Ntinas, I. Vourkas, A. Abusleme, and 2 more authors

   IEEE Transactions on Neural Networks and Learning Systems, 2018

   Abstract DOI 70

   This paper presents a fully digital implementation of a memristor hardware simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity.

2. NMDC

   Future and Emergent Materials and Devices for Resistive Switching

   P. Karakolis, P. Normand, P. Dimitrakis, and 4 more authors

   In 2018 IEEE 13th Nanotechnology Materials and Devices Conference (NMDC), 2018

   Abstract DOI 5

   During the last years, Resistive Random-Access Memories (ReRAMs or RRAMs) stimulated growing attention as promising non-volatile (NV) candidate memories to surpass existing storage devices while exhibiting excellent performance, reliability and low-energy operation and in the same time be utilized for unconventional computing paradigms such as neuromorphic and in-memory computation. In this paper, a brief review on the current state of the art for RRAMs is provided mainly focusing on the resistance switching mechanisms for various materials and corresponding devices. More specifically, we report on the switching mechanisms of RRAMs considering resistance bi-stability due to phase transformation, interfacial resistive switching, conductive filaments and thermochemical effects while the effect of environmental conditions like moisture and temperature is also analyzed. Finally, preliminary results related to our on-going investigations on such a type of Metal-Insulator-Metal (MIM) RRAMs devices derived from Silicon Nitride and compatible with existing CMOS technology are presented and further discussed.

3. ANNA

   Early Approach of Qubit State Representation with Memristors

   I. Fyrigos, V. Ntinas, I. Karafyllidis, and 3 more authors

   In Advances in Neural Networks and Applications (ANNA’18), 2018

   Abstract 5

   In this paper we explore further the potential coupling of quantum computing with memristor technology. Taking the lead from co-authors’ previous work, we are examining a number of memristor models and configurations corresponding to real memristor devices, aiming to the possible improvement of quantum bit (qubit) state representation with appropriate memristor states. Simulations results of the aforementioned models and configurations present in a qualitative and quantitative way the feasibility of this study in an efficient manner.

4. ANNA

   Analytical DC Model of a TaO Memristor

   A. Ascoli, R. Tetzlaff, V. Ntinas, and 1 more author

   In Advances in Neural Networks and Applications (ANNA’18), 2018

   Abstract 0

   Circuit designers are used to employ analytical formulas and numerically stable expressions for the input-output behaviour of electronic components in preliminary calculations intended to select the most suitable circuit topology to meet prescribed design specifications. Manufactured memristors are highly-nonlinear dynamical circuit elements for new future electronics. However the Differential Algebraic Equation sets, used to capture accurately their nonlinear dynamics, typically consist of involved mathematical expressions, which prevent their analytical integration and the derivation of input-output formulas for circuit design. Adopting certain mathematical techniques, we were recently able to derive for the first time, formulas for the DC behaviour of a real-world memristor exhibiting both non-volatility and fading memory. Particularly, on the basis of an accurate mathematical model, this paper presents a set of analytical expressions for the memory state response of a tantalum oxide resistance switching memory, fabricated at the Palo Alto facilities of Hewlett Packard Labs, to any DC stimulus and for all initial conditions.

5. CNNA

   Game of Life in Memristor Cellular Automata Grid

   R. Karamani, I. Fyrigos, V. Ntinas, and 2 more authors

   In (CNNA) 2018; The 16th International Workshop on Cellular Nanoscale Networks and their Applications, 2018

   Abstract 17

   Conway’s Game of Life (GoL), a zero-player game which belongs to the category of Life-like Cellular Automata (CA), has intrigued researchers from a wide range of scientific areas as it exhibits self organization, the emergence of complex patterns while even implementing a universal Turing machine, despite its simplistic nature. In general, CA is a biologically inspired computational model which is able to approach the behavior of complex natural phenomena by utilizing the locality of interconnected simple elements, namely the CA cells. This work proposes a novel CA cell which exploits the advantages of memristor devices, such as adaptivity and CMOS compatibility, to reproduce the behavior of GoL in circuit-level. Such designs are essential for the development of application specific future electronic systems that will be able to operate in real-time and communicate with other biological systems. The proposed circuit was designed and simulated using the Cadence PSPICE environment.

6. ISCAS

   Memristive Cellular Automata for Modeling of Epileptic Brain Activity

   R. Karamani, I. Fyrigos, V. Ntinas, and 3 more authors

   In 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018

   Abstract DOI 14

   Cellular Automata (CA) is a nature-inspired and widespread computational model which is based on the collective and emergent parallel computing capability of units (cells) locally interconnected in an abstract brain-like structure. Each such unit, referred as CA cell, performs simplistic computations/processes. However, a network of such identical cells can exhibit nonlinear behavior and be used to model highly complex physical phenomena and processes and to solve problems that are highly complicated for conventional computers. Brain activity has always been considered one of the most complex physical processes and its modeling is of utter importance. This work combines the CA parallel computing capability with the nonlinear dynamics of the memristor, aiming to model brain activity during the epileptic seizures caused by the spreading of pathological dynamics from focal to healthy brain regions. A CA-based confrontation extended to include long-range interactions, combined with the recent notion of memristive electronics, is thus proposed as a modern and promising parallel approach to modeling of such complex physical phenomena. Simulation results show the efficiency of the proposed design and the appropriate reproduction of the spreading of an epileptic seizure.

7. ISCAS

   Coupled Physarum-Inspired Memristor Oscillators for Neuron-Like Operations

   V. Ntinas, I. Vourkas, G. Sirakoulis, and 2 more authors

   In 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018

   Abstract DOI 12

   Unconventional computing has been studied intensively, even after the appearance of CMOS technology. Currently, it has returned to the spotlight because CMOS is about to reach its physical limits, given that the constant demand for more computational power requires for novel unconventional computing solutions. In this area, the oscillatory internal motion mechanism of slime mould, namely Physarum Polycephalum, could serve as an alternative concept for the design and development of electronic circuits that exploit the memristive dynamics and simple LC contours to deliver solutions for computationally hard to be solved problems. In this direction, this work presents how bio-inspired memristive LC oscillators with a coupling capacitor can be synchronized to perform the functionalities of a biological neuron, also able to execute more complex computations, aiming to model biological neural systems much more advanced than the neuron-less slime mould biological organism. This work proposes a connection between the function mechanism of a simple biological organism and that of complex biological systems, made in a plausible and sufficient manner, towards unconventional computation with memristors.

2017

1. TCAS-I

   Memristor Crossbar for Adaptive Synchronization

   L. V. Gambuzza, M. Frasca, L. Fortuna, and 3 more authors

   IEEE Transactions on Circuits and Systems I: Regular Papers, 2017

   Abstract DOI 46

   Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N2, where N is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant.

2. TCAS-I

   Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations

   V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, and 1 more author

   IEEE Transactions on Circuits and Systems I: Regular Papers, 2017

   Abstract DOI 42

   The ability of slime mould to learn and adapt to periodic changes in its environment inspired scientists to develop behavioral memristor-based circuit models of its memory organization. The computing abilities of slime mould Physarum polycephalum have been used in several applications, including to solve mazes. This work presents a circuit-level bio-inspired maze-solving approach via an electronic model of the oscillatory internal motion mechanism of slime mould, which emulates the local signal propagation and the expansion of its vascular network. Our implementation takes into account the inherent noise existent in the equivalent biological circuit, so that its behavior becomes closer to the non-deterministic behavior of the real organism. The efficiency and generality of the proposed electronic computing medium was validated through SPICE-level circuit simulations and compared with data from two cardinally different biological experiments, concerning 1) enhancing of Physarum’s protoplasmic tubes along shortest path and 2) chemo-tactic growth by diffusing chemo-attractants.

3. J.Comp.Sci

   Parallel Fuzzy Cellular Automata for Data-Driven Simulation of Wildfire Spreading

   V. Ntinas, B. E. Moutafis, G. A. Trunfio, and 1 more author

   Journal of Computational Science, 2017

   Abstract DOI 77

   This paper presents a data-driven simulation approach based on parallel fuzzy cellular automata for wildfire spreading, validated against real fire data.

4. J.Phys.D

   Modeling Physarum Space Exploration Using Memristors

   V. Ntinas, I. Vourkas, G. Ch. Sirakoulis, and 1 more author

   Journal of Physics D: Applied Physics, 2017

   Abstract DOI 29

   Slime mold Physarum polycephalum optimizes its foraging behaviour by minimizing the distances between the sources of nutrients it spans. When two sources of nutrients are present, the slime mold connects the sources, with its protoplasmic tubes, along the shortest path. We present a two-dimensional mesh grid memristor based model as an approach to emulate Physarum’s foraging strategy, which includes space exploration and reinforcement of the optimally formed interconnection network in the presence of multiple aliment sources. The proposed algorithmic approach utilizes memristors and LC contours and is tested in two of the most popular computational challenges for Physarum, namely maze and transportation networks. Furthermore, the presented model is enriched with the notion of noise presence, which positively contributes to a collective behavior and enables us to move from deterministic to robust results. Consequently, the corresponding simulation results manage to reproduce, in a much better qualitative way, the expected transportation networks.

5. Electron.Lett

   Closed-Form Analytical Solution for On-Switching Dynamics in a TaO Memristor

   A. Ascoli, V. Ntinas, R. Tetzlaff, and 1 more author

   Electronics Letters, 2017

   Abstract DOI 18

   For the first time, the model of a physical nano-scale memristor is integrated analytically. A closed-form expression for the time evolution of the device memristance during the turn-on process is mathematically derived. The complexity of the inverse imaginary error function-based analytical formula clearly reflects the high degree of nonlinearity in the nano-device switching kinetics, which may typically span several orders of magnitude and is critically dependent on input and initial condition. The excellent agreement between the analytical solution and numerical simulation results clearly demonstrates the correctness of the theoretical derivation. The introduction of this formula represents the first step towards a systematic approach to circuit design with memristors.

6. PACET

   Towards an Analytical Description of a TaO Memristor

   A. Ascoli, R. Tetzlaff, V. Ntinas, and 1 more author

   In 2017 Panhellenic Conference on Electronics and Telecommunications (PACET), 2017

   Abstract DOI 0

   Memristors promise to revolutionise the world of electronics in the years to come. Besides their most popular applications in the fields of non-volatile memory design and neuro-morphic system development, their ability to process signals and store data in the same physical location may allow the conception of novel mem-computing machines outperforming state-of-the-art hardware systems suffering from the Von Neumann bottleneck. The complexity of real-world memristor models, capturing the inherent nonlinearity of the switching kinetics of the nanodevices, is one of the obstacles towards an extensive exploration of the full potential of memristors in nanoelectronics. It is well-known, in fact, that serious convergence issues frequently arise in the numerical simulation of the differential algebraic equation sets modelling the dynamics of real-world memristors. In this work we propose a strategy to develop a general closed-form mathematical representation of a real-world voltage-controlled memristor manufactured by Hewlett Packard Enterprise. The study aims to derive an analytical formula for the memductance of the nano-device under a general voltage input, starting off from the DC case. This research should be of great benefit to circuit designers, which typically use analytical formulas for the first hands-on calculations in the search for circuit topologies satisfying a certain set of specifications.

7. PATMOS

   1-D Memristor-Based Cellular Automaton for Pseudo-Random Number Generation

   R. Karamani, V. Ntinas, I. Vourkas, and 1 more author

   In 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017

   Abstract DOI 14

   Cellular Automata (CAs) is a well-known parallel, bio-inspired, computational model. It is based on the capability of simpler, locally interacting units, i.e. the CAs cells, to evolve in time, giving rise to emergent computation, suitable to model physical system behavior, prediction of natural phenomena and multi-dimensional problem solutions. Moreover, at the same time CAs constitute a promising computing platform, beyond the von Neumann architecture. In this paper, a memristor device is considered to be the basic module of a CA cell circuit implementation, performing as a combined memory and processing element to implement CA-based circuits, able to model sufficiently systems and applications as mentioned above, targeting tentatively to a more energy efficient design compared to the conventional electronics. In particular and as a proof of concept, the results of elementary CAs modeling and simulation for the generation of pseudo-random numbers are presented using a 1-D memristor-based CAs array to illustrate the robustness and the efficacy of the proposed computing approach.

8. ECCTD

   Transformation Techniques Applied to a TaO Memristor Model to Enable Stable Device Simulations

   V. Ntinas, A. Ascoli, R. Tetzlaff, and 1 more author

   In 2017 European Conference on Circuit Theory and Design (ECCTD), 2017

   Abstract DOI 14

   Given the complexity of the mathematical descriptions of real nanodevices with memristor fingerprints, convergence issues often emerge in the simulation of circuits employing memristors, even for a limited number of instances. Actually the simulation of one-memristor circuits may also be troublesome for some inputs and/or initial conditions. This problem prevents a thorough test of memristor circuit designs, representing a severe obstacle towards an extensive use of memristors in electronics. In this work we propose techniques to transform a highly-reliable physics-based model of the Tantalum oxide memristor from Hewlett Packard Labs in a form which lends itself naturally to stable numerical simulations. The results of this study shall pave the way towards a more extensive exploration of the full potential of memristors in integrated circuit design.

2016

1. CNNA

   A New Approach Based on Memristor Crossbar for Synchronization

   L. V. Gambuzza, M. Frasca, L. Fortuna, and 3 more authors

   In (CNNA) 2016; 15th International Workshop on Cellular Nanoscale Networks and their Applications, 2016

   Abstract 2

   We propose the use of memristor crossbar for synchronizing nonlinear chaotic circuits. By means of this approach, the nonlinearity and memory features of the memristors are exploited to massively couple the dynamical system units with weights (the state variable of the memristors) which evolve as function of the differences between the state variables of the circuits. In this extended abstract we briefly illustrate the approach and numerical results confirming its suitability.

2. IVSW

   A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks

   I. Vourkas, A. Abusleme, V. Ntinas, and 2 more authors

   In 2016 1st IEEE International Verification and Security Workshop (IVSW), 2016

   Abstract DOI 51

   FPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltage-controlled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memristive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.

3. PPAM

   GPU and FPGA Parallelization of Fuzzy Cellular Automata for the Simulation of Wildfire Spreading

   V. Ntinas, B. E. Moutafis, G. A. Trunfio, and 1 more author

   In Parallel Processing and Applied Mathematics, 2016

   Abstract DOI 9

   This paper presents a Fuzzy Cellular Automata (FCA) model with the aim to cope with the computational complexity and data uncertainties that characterize the simulation of wildfire spreading on real landscapes. Moreover, parallel implementations of the proposed FCA model, on both GPU and FPGA, are discussed and investigated. According to the results, the parallel models exhibit significant speedups over the corresponding sequential algorithm. As a possible application, the proposed model could be embedded on a portable electronic system for real-time prediction of fire spread scenarios.

2015

1. ISCAS

   LC Filters with Enhanced Memristive Damping

   V. Ntinas, I. Vourkas, and G. Sirakoulis

   In 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015

   Abstract DOI 26

   Within an ever-increasing variety of applications for memristors, adaptive electronic circuits have attracted considerable attention lately. This paper extends previously published work on memristive filter design to include the potential of composite memristive devices as damping elements in LC-based sensing circuits. The collective response of several LC contours with different memristive damping is considered. A thorough study of the circuit properties is performed in an attempt to exploit the high sensitivity of the circuit, other than address it as a typical drawback. The simulated circuits could find application in bio-inspired information processing, whereas could lead to better behavioral models for biological organisms.